DAC7615
®
© 1998 Burr-Brown Corporation
PDS-1443C
Printed in U.S.A. November, 1998
Quad, Serial Input, 12-Bit, Voltage Output
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q
LOW POWER: 20mW
q
UNIPOLAR OR BIPOLAR OPERATION
q
SETTLING TIME: 10
µ
s to 0.012%
q
12-BIT LINEARITY AND MONOTONICITY:
–40
°
C to +85
°
C
q
DOUBLE-BUFFERED DATA INPUTS
q
SMALL 20-LEAD SSOP PACKAGE
APPLICATIONS
q
PROCESS CONTROL
q
ATE PIN ELECTRONICS
q
CLOSED-LOOP SERVO-CONTROL
q
MOTOR CONTROL
q
DATA ACQUISITION SYSTEMS
q
DAC-PER-PIN PROGRAMMERS
DESCRIPTION
The DAC7615 is a quad, serial input, 12-bit, voltage
output digital-to-analog converter (DAC) with guar-
anteed 12-bit monotonic performance over the –40
°
C
to +85
°
C temperature range. An asynchronous reset
clears all registers to either mid-scale (800
H
) or zero-
scale (000
H
), selectable via the RESETSEL pin. The
individual DAC inputs are double buffered to allow
for simultaneous update of all DAC outputs. The
device can be powered from a single +5V supply or
from dual +5V and –5V supplies.
Low power and small size makes the DAC7615 ideal
for automatic test equipment, DAC-per-pin program-
mers, data acquisition systems, and closed-loop servo-
control. The device is available in 16-pin plastic DIP,
16-lead SOIC, and 20-lead SSOP packages and is
guaranteed over the –40
°
C to +85
°
C temperature range.
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
DAC A
DAC
Register A
Input
Register A
DAC B
DAC
Register B
Input
Register B
DAC C
DAC
Register C
Input
Register C
DAC D
DAC
Register D
Input
Register D
V
REFH
V
DD
V
SS
V
OUTD
V
OUTC
V
OUTB
V
OUTA
V
REFL
LOADDACS
GND
CLK
CS
12
SDI
RESET
RESETSEL
LOADREG
Serial-to-
Parallel
Shift
Register
DAC
Select
DAC7615
DAC7615
®
2
DAC7615
SPECIFICATIONS
At T
A
= –40
°
C to +85
°
C, V
DD
= +5V, V
SS
= –5V, V
REFH
= +2.5V, and V
REFL
= –2.5V, unless otherwise noted.
DAC7615E, P, U
DAC7615EB, PB, UB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error
(1)
V
SS
= 0V or –5V
±
2
±
1
LSB
(2)
Linearity Matching
(3)
V
SS
= 0V or –5V
±
2
±
1
LSB
Differential Linearity Error
V
SS
= 0V or –5V
±
1
±
1
LSB
Monotonicity
12
T
Bits
Zero-Scale Error
Code = 000
H
±
4
T
LSB
Zero-Scale Drift
2
5
T
T
ppm/
°
C
Zero-Scale Matching
(3)
±
2
±
1
LSB
Full-Scale Error
Code = FFF
H
±
4
T
LSB
Full-Scale Matching
(3)
±
2
±
1
LSB
Zero-Scale Error
Code = 00A
H
, V
SS
= 0V
±
8
T
LSB
Zero-Scale Drift
V
SS
= 0V
5
10
T
T
ppm/
°
C
Zero-Scale Matching
(3)
V
SS
= 0V
±
4
±
2
LSB
Full-Scale Error
Code = FFF
H
, V
SS
= 0V
±
8
T
LSB
Full-Scale Matching
(3)
V
SS
= 0V
±
4
±
2
LSB
Power Supply Rejection
30
T
ppm/V
ANALOG OUTPUT
Voltage Output
(4)
V
SS
= 0V or –5V
V
REFL
V
REFH
T
T
V
Output Current
–1.25
+1.25
T
T
mA
Load Capacitance
No Oscillation
100
T
pF
Short-Circuit Current
+5, –15
T
mA
Short-Circuit Duration
Indefinite
T
REFERENCE INPUT
V
REFH
Input Range
V
SS
= 0V or –5V
V
REFL
+1.25
+2.5
T
T
V
V
REFL
Input Range
V
SS
= 0V
0
V
REFH
–1.25
T
T
V
V
REFL
Input Range
V
SS
= –5V
–2.5
V
REFH
–1.25
T
T
V
DYNAMIC PERFORMANCE
Settling Time
(5)
To
±
0.012%
5
10
T
T
µ
s
Channel-to-Channel Crosstalk
Full-Scale Step
0.1
T
LSB
On Any Other DAC, R
L
= 2k
Ω
Output Noise Voltage
Bandwidth: 0Hz to 1MHz
40
T
nV/
√
Hz
DIGITAL INPUT/OUTPUT
Logic Family
TTL-Compatible CMOS
T
Logic Levels
V
IH
| I
IH
|
≤
10
µ
A
2.4
V
DD
+0.3
T
T
V
V
IL
| I
IL
|
≤
10
µ
A
–0.3
0.8
T
T
V
Data Format
Straight Binary
T
POWER SUPPLY REQUIREMENTS
V
DD
4.75
5.25
T
T
V
V
SS
If V
SS
≠
0V
–5.25
–4.75
T
T
V
I
DD
1.5
1.9
T
T
mA
I
SS
–2.1
–1.6
T
T
mA
Power Dissipation
V
SS
= –5V
15
20
T
T
mW
V
SS
= 0V
7.5
10
T
T
mW
TEMPERATURE RANGE
Specified Performance
–40
+85
T
T
°
C
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
T
Specification same as grade to the left.
NOTES: (1) If V
SS
= 0V, specification applies at code 00A
H
and above. (2) LSB means Least Significant Bit, with V
REFH
equal to +2.5V and V
REFL
equal to –2.5V,
one LSB is 1.22mV. (3) All DAC outputs will match within the specified error band. (4) Ideal output voltage, does not take into account zero or full-scale error.
(5) If V
SS
= –5V, full-scale step from code 000
H
to FFF
H
or vice-versa. If V
SS
= 0V, full-scale positive step from code 000
H
to FFF
H
and negative step from code
FFF
H
to 00A
H
.
3
®
DAC7615
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS
(1)
V
DD
to V
SS
........................................................................... –0.3V to +11V
V
DD
to GND ........................................................................ –0.3V to +5.5V
V
REFL
to V
SS
............................................................... –0.3V to (V
DD
– V
SS
)
V
DD
to V
REFH
.............................................................. –0.3V to (V
DD
– V
SS
)
V
REFH
to V
REFL
............................................................ –0.3V to (V
DD
– V
SS
)
Digital Input Voltage to GND ...................................... –0.3V to V
DD
+ 0.3V
Maximum Junction Temperature ................................................... +150
°
C
Operating Temperature Range ......................................... –40
°
C to +85
°
C
Storage Temperature Range .......................................... –65
°
C to +150
°
C
Lead Temperature (soldering, 10s) ............................................... +300
°
C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
PACKAGE/ORDERING INFORMATION
MAXIMUM
MAXIMUM
LINEARITY
DIFFERENTIAL
PACKAGE
SPECIFICATION
ERROR
LINEARITY
DRAWING
TEMPERATURE
ORDERING
TRANSPORT
PRODUCT
(LSB)
(LSB)
PACKAGE
NUMBER
(1)
RANGE
NUMBER
(2)
MEDIA
DAC7615P
±
2
±
1
16-Pin DIP
180
–40
°
C to +85
°
C
DAC7615P
Rails
DAC7615PB
"
"
"
"
"
DAC7615PB
Rails
DAC7615U
±
2
±
1
16-Lead SOIC
211
–40
°
C to +85
°
C
DAC7615U
Rails
"
"
"
"
"
"
DAC7615U/1K
Tape and Reel
DAC7615UB
±
1
±
1
16-Lead SOIC
211
–40
°
C to +85
°
C
DAC7615UB
Rails
"
"
"
"
"
"
DAC7615UB/1K
Tape and Reel
DAC7615E
±
2
±
1
20-Lead SSOP
334
–40
°
C to +85
°
C
DAC7615E
Rails
"
"
"
"
"
"
DAC7615E/1K
Tape and Reel
DAC7615EB
±
1
±
1
20-Lead SSOP
334
–40
°
C to +85
°
C
DAC7615EB
Rails
"
"
"
"
"
"
DAC7615EB/1K
Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “DAC7615EB/1K” will get a single
1000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
®
4
DAC7615
PIN CONFIGURATION—P, U Packages
Top View
PDIP, SOIC
PIN CONFIGURATION—E Package
Top View
SSOP
PIN DESCRIPTIONS—E Package
PIN
LABEL
DESCRIPTION
1
V
DD
Positive Analog Supply Voltage, +5V nominal.
2
V
OUTD
DAC D Voltage Output
3
V
OUTC
DAC C Voltage Output
4
V
REFL
Reference Input Voltage Low. Sets minimum out-
put voltage for all DACs.
5
NIC
Not Internally Connected.
6
NIC
Not Internally Connected.
7
V
REFH
Reference Input Voltage High. Sets maximum out-
put voltage for all DACs.
8
V
OUTB
DAC B Voltage Output
9
V
OUTA
DAC A Voltage Output
10
V
SS
Negative Analog Supply Voltage, 0V or –5V nomi-
nal.
11
GND
Ground
12
SDI
Serial Data Input
13
CLK
Serial Data Clock
14
CS
Chip Select Input
15
NIC
Not Internally Connected.
16
NIC
Not Internally Connected.
17
LOADDACS
All DAC registers becomes transparent when
LOADDACS is LOW. They are in the latched state
when LOADDACS is HIGH.
18
LOADREG
The selected input register becomes transparent
when LOADREG is LOW. It is in the latched state
when LOADREG is HIGH.
19
RESET
Asynchronous Reset Input. Sets all DAC registers
to either zero-scale (000
H
) or mid-scale (800
H
)
when LOW. RESETSEL determines which code is
active.
20
RESETSEL
When LOW, a LOW on RESET will cause all DAC
registers to be set to code 000
H
. When RESETSEL
is HIGH, a LOW on RESET will set the registers to
code 800
H
.
PIN DESCRIPTIONS—P, U Packages
PIN
LABEL
DESCRIPTION
1
V
DD
Positive Analog Supply Voltage, +5V nominal.
2
V
OUTD
DAC D Voltage Output
3
V
OUTC
DAC C Voltage Output
4
V
REFL
Reference Input Voltage Low. Sets minimum out-
put voltage for all DACs.
5
V
REFH
Reference Input Voltage High. Sets maximum out-
put voltage for all DACs.
6
V
OUTB
DAC B Voltage Output
7
V
OUTA
DAC A Voltage Output
8
V
SS
Negative Analog Supply Voltage, 0V or –5V nomi-
nal.
9
GND
Ground
10
SDI
Serial Data Input
11
CLK
Serial Data Clock
12
CS
Chip Select Input
13
LOADDACS
All DAC registers become transparent when
LOADDACS is LOW. They are in the latched state
when LOADDACS is HIGH.
14
LOADREG
The selected input register becomes transparent
when LOADREG is LOW. It is in the latched state
when LOADREG is HIGH.
15
RESET
Asynchronous Reset Input. Sets DAC and input
registers to either zero-scale (000
H
) or mid-scale
(800
H
) when LOW. RESETSEL determines which
code is active.
16
RESETSEL
When LOW, a LOW on RESET will cause the DAC
and input registers to be set to code 000
H
. When
RESETSEL is HIGH, a LOW on RESET will set the
registers to code 800
H
.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
V
OUTD
V
OUTC
V
REFL
V
REFH
V
OUTB
V
OUTA
V
SS
RESETSEL
RESET
LOADREG
LOADDACS
CS
CLK
SDI
GND
DAC7615P, U
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
V
OUTD
V
OUTC
V
REFL
NIC
NIC
V
REFH
V
OUTB
V
OUTA
V
SS
RESETSEL
RESET
LOADREG
LOADDACS
NIC
NIC
CS
CLK
SDI
GND
DAC7615E
5
®
DAC7615
TYPICAL PERFORMANCE CURVES: V
SS
= 0V
At T
A
= +25
°
C, V
DD
= +5V, V
SS
= 0V, V
REFH
= +2.5V, and V
REFL
= 0V, representative unit, unless otherwise specified.
LINEARITY ERROR and
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A)
200
H
000
H
Digital Input Code
DLE (LSB)
LE (LSB)
0.50
0.00
–0.25
–0.50
0.50
0.25
0.00
–0.50
–0.25
0.25
400
H
600
H
800
H
A00
H
C00
H
E00
H
FFF
H
LINEARITY ERROR and
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B)
000
H
Digital Input Code
DLE (LSB)
LE (LSB)
0.50
0.00
–0.25
–0.50
0.50
0.25
0.00
–0.50
–0.25
0.25
200
H
400
H
600
H
800
H
A00
H
C00
H
E00
H
FFF
H
LINEARITY ERROR and
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C)
000
H
Digital Input Code
DLE (LSB)
LE (LSB)
0.50
0.00
–0.25
–0.50
0.50
0.25
0.00
–0.50
–0.25
0.25
200
H
400
H
600
H
800
H
A00
H
C00
H
E00
H
FFF
H
LINEARITY ERROR and DIFFERENTIAL
LINEARITY ERROR vs CODE
(DAC D)
000
H
Digital Input Code
DLE (LSB)
LE (LSB)
0.50
0.00
–0.25
–0.50
0.50
0.25
0.00
–0.50
–0.25
0.25
200
H
400
H
600
H
800
H
A00
H
C00
H
E00
H
FFF
H
LINEARITY ERROR vs CODE
(DAC A, –40°C and +85°C)
000
H
Digital Input Code
LE (LSB)
LE (LSB)
0.50
0.00
–0.25
–0.50
0.50
0.25
0.00
–0.50
–0.25
0.25
+85°C
–40°C
200
H
400
H
600
H
800
H
A00
H
C00
H
E00
H
FFF
H
LINEARITY ERROR vs CODE
(DAC B, –40°C and +85°C)
000
H
Digital Input Code
LE (LSB)
LE (LSB)
0.50
0.00
–0.25
–0.50
0.50
0.25
0.00
–0.50
–0.25
0.25
+85°C
–40°C
200
H
400
H
600
H
800
H
A00
H
C00
H
E00
H
FFF
H
®
6
DAC7615
TYPICAL PERFORMANCE CURVES: V
SS
= 0V
(CONT)
At T
A
= +25