DAC80, DAC80P

FPO

FPO 41%

Monolithic 12-Bit

DIGITAL-TO-ANALOG CONVERTERS

FEATURES

INDUSTRY STANDARD PINOUT

FULL

10V SWING WITH V

12VDC

DIGITAL INPUTS ARE TTL- AND

CMOS-COMPATIBLE

GUARANTEED SPECIFICATIONS WITH

12V AND

15V SUPPLIES

1/2LSB MAXIMUM NONLINEARITY:

C to +70

SETTLING TIME: 4

s max to

0.01% of

Full Scale

GUARANTEED MONOTONICITY:

C to +70

TWO PACKAGE OPTIONS: Hermetic side-

brazed ceramic and low-cost molded

plastic

DESCRIPTION

This monolithic digital-to-analog converter is pin-for-

pin equivalent to the industry standard DAC80 first

introduced by Burr-Brown. Its single-chip design in-

cludes the output amplifier and provides a highly

stable reference capable of supplying up to 2.5mA to

an external load without degradation of D/A perfor-

mance.

This converter uses proven circuit techniques to pro-

vide accurate and reliable performance over tempera-

ture and power supply variations. The use of a buried

zener diode as the basis for the internal reference

contributes to the high stability and low noise of the

device. Advanced methods of laser trimming result in

precision output current and output amplifier feedback

resistors, as well as low integral and differential lin-

earity errors. Innovative circuit design enables the

DAC80 to operate at supply voltages as low as

11.4V

with no loss in performance or accuracy over any

range of output voltage. The lower power dissipation

of this 118-mil by 121-mil chip results in higher

reliability and greater long term stability.

Burr-Brown has further enhanced the reliability of the

monolithic DAC80 by offering a hermetic, side-brazed,

ceramic package. In addition, ease of use has been

enhanced by eliminating the need for a +5V logic

power supply.

For applications requiring both reliability and low

cost, the DAC80P in a molded plastic package offers

the same electrical performance over temperature as

the ceramic model. The DAC80P is available with

voltage output only.

For designs that require a wider temperature range, see

Burr-Brown models DAC85H and DAC87H.

DAC80

DAC80P

International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706

Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

Reference

Control

Circuit

12-Bit

Resistor

Ladder

Network

and

Current

Switches

Digital Inputs

Reference

Gain

Adjustment

Scaling

Network

Analog

Output

Offset

Adjustment

+ Supply

– Supply

1986 Burr-Brown Corporation

PDS-643F

Printed in U.S.A. July, 1993

DAC80/80P

DAC80

PARAMETER

MIN

TYP

MAX

UNITS

DIGITAL INPUT

Resolution

Bits

Logic Levels (0

C to +70

(1)

(Logic “1”)

+16.5

VDC

(Logic “0”)

+0.8

VDC

= +2.4V)

+20

= +0.4V)

–180

ACCURACY (at +25

Linearity Error

1/4

1/2

LSB

Differential Linearity Error

1/2

3/4

LSB

Gain Error

(2)

0.1

0.3

Offset Error

(2)

0.05

0.15

% of FSR

(3)

DRIFT (0

C to +70

(4)

Total Bipolar Drift (includes gain, offset, and linearity drifts)

ppm of FSR/

Total Error Over 0

C to +70

(5)

Unipolar

0.06

0.15

% of FSR

Bipolar

0.06

0.12

% of FSR

Gain: Including Internal Reference

ppm/

Excluding Internal Reference

ppm/

Unipolar Offset

ppm of FSR/

Bipolar Offset

ppm of FSR/

Differential Linearity 0

C to +70

1/2

3/4

LSB

Linearity Error 0

C to +70

1/4

1/2

LSB

Monotonicity Guaranteed

+70

CONVERSION SPEED, V

OUT

Models

Settling Time to

0.01% of FSR

For FSR Change (2k

Ω

|| 500pF Load)

with 10k

Ω

Feedback

with 5k

Ω

Feedback

For 1LSB Change

Slew Rate

CONVERSION SPEED, I

OUT

Models

Settling Time to

0.01% of FSR

For FSR change: 10

Ω

to 100

Ω

Load

300

Ω

Load

ANALOG OUTPUT, V

OUT

Models

Ranges

Output Current

(6)

Output Impedance (DC)

0.05

Ω

Short Circuit to Common, Duration

(7)

Indefinite

ANALOG OUTPUT, I

OUT

Models

Ranges: Bipolar

0.96

1.0

1.04

Unipolar

–1.96

–2.0

–2.04

Output Impendance: Bipolar

2.6

3.2

3.7

Ω

Unipolar

4.6

6.6

8.6

Ω

Compliance

–2.5

+2.5

REFERENCE VOLTAGE OUTPUT

+6.23

+6.30

+6.37

External Current (constant load)

2.5

Drift vs Temperature

ppm/

Output Impedance

Ω

POWER SUPPLY SENSITIVITY

12VDC or

15VDC

0.002

0.006

% FSR/ % V

POWER SUPPLY REQUIREMENTS

11.4

16.5

VDC

Supply Drain (no load): +V

–V

Power Dissipation (V

15VDC)

345

480

TEMPERATURE RANGE

Specification

+70

Operating

–25

+85

Storage: Plastic DIP

–60

+100

Ceramic DIP

–65

+150

SPECIFICATIONS

ELECTRICAL

Typical at +25

C and

= 12V or 15V unless otherwise noted.

NOTES: (1) Refer to “Logic Input Compatibility” section. (2) Adjustable to zero with external trim potentiometer. (3) FSR means full scale range and is 20V for

10V range,

10V for

5V range for V

OUT

models; 2mA for I

OUT

models. (4) To maintain drift spec, internal feedback resistors must be used. (5) Includes the effects of gain, offset

and linearity drift. Gain and offset errors externally adjusted to zero at +25

C. (6) For

less than

12VDC, limit output current load to

2.5mA to maintain

10V full

scale output voltage swing. For output range of

5V or less, the output current is

5mA over entire

range. (7) Short circuit current is 40mA, max.

2.5,

10, +5, +10

DAC80/80P

FUNCTIONAL DIAGRAM AND PIN ASSIGNMENTS

ABSOLUTE MAXIMUM RATINGS

PACKAGE INFORMATION

NOTE: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix D of Burr-Brown IC Data Book.

PACKAGE DRAWING

MODEL

PACKAGE

NUMBER

(1)

DAC80P

24-Pin Plastic DIP

167

DAC80

24-Pin Ceramic DIP

125

to Common ...................................................................... 0V to +18V

–V

to Common ......................................................................... 0V to –18

Digital Data Inputs to Common .............................................. –1V to +18V

Reference Output to Common ............................................................

Reference Input to Common ...............................................................

Bipolar Offset to Common ...................................................................

10V Range R to Common ...................................................................

20V Range R to Common ...................................................................

External Voltage to DAC Output .............................................. –5V to +5V

Lead Temperature (soldering, 10s) ................................................ +300

Max Junction Temperature .............................................................. 165

Thermal Resistance,

: Plastic DIP ........................................... 100

C/W

Ceramic DIP ......................................... 65

C/W

Stresses above those listed under “Absolute Maximum Ratings” may

cause permanent damage to the device. Exposure to absolute maxi-

mum conditions for extended periods may affect device reliability.

NOTE: (1) Logic supply applied to this pin has no effect.

(MSB) Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10

Bit 11

(LSB) Bit 12

6.3V Ref Out

Gain Adjust

Common

Summing Junction

20V Range

10V Range

Bipolar Offset

Ref Input

OUT

–V

(1)

Reference

Control

Circuit

12-Bit

Resistor

Ladder

Network

and

Current

Switches

(MSB) Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10

Bit 11

(LSB) Bit 12

6.3V Ref Out

Gain Adjust

Common

Scaling Network

Bipolar Offset

Ref Input

OUT

–V

(1)

Reference

Control

Circuit

12-Bit

Resistor

Ladder

Network

and

Current

Switches

Voltage Models

Current Models

Ω

6.3k

Ω

6.3k

Ω

BURN-IN SCREENING

Burn-in screening is an option available for the models

indicated in the Ordering Information table. Burn-in dura-

tion is 160 hours at the maximum specified grade operating

temperature (or equivalent combination of time and tem-

perature).

All units are tested after burn-in to ensure that grade speci-

fications are met. To order burn-in, add “–BI” to the base

model number.

ORDERING INFORMATION

MODEL

PACKAGE

OUTPUT

DAC80-CBI-I

Ceramic DIP

Current

DAC80Z-CBI-I

Ceramic DIP

Current

DAC80-CBI-V

Ceramic DIP

Voltage

DAC80Z-CBI-V

Ceramic DIP

Voltage

DAC80P-CBI-V

Plastic DIP

Voltage

BURN-IN SCREENING OPTION

BURN-IN TEMP.

MODEL

PACKAGE

(160h)

(1)

DAC80-CBI-V-BI

Ceramic DIP

+125

DAC80P-CBI-V-BI

Plastic DIP

+125

NOTE: (1) Or equivalent combination. See text.

DAC80/80P

–V

OUT

Ref In

Bipolar Offset

Scale 10V FSR

Scale 20V FSR

Scale

COM

Gain Adjust

6.3V Ref Out

PAD

FUNCTION

Bit 1 (MSB)

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10

Bit 11

Bit 12 (LSB)

PAD

FUNCTION

Substrate Bias: Isolated. NC: No Connection

MECHANICAL INFORMATION

MILS (0.001")

MILLIMETERS

Die Size

118 x 121

3.0 x 3.07

0.13

Die Thickness

0.51

0.08

Min. Pad Size

4 x 4

0.10 x 0.10

Metalization

Aluminum

–V

OUT

Ref In

Bipolar Offset

Scale 10V FSR

Scale 20V FSR

Sum Junct

COM

Gain Adjust

6.3V Ref Out

PAD

FUNCTION

Bit 1 (MSB)

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 8

Bit 9

Bit 10

Bit 11

Bit 12 (LSB)

PAD

FUNCTION

Substrate Bias: Isolated. NC: No Connection

MECHANICAL INFORMATION

MILS (0.001")

MILLIMETERS

Die Size

118 x 121

3.0 x 3.07

0.13

Die Thickness

0.51

0.08

Min. Pad Size

4 x 4

0.10 x 0.10

Metalization

Aluminum

DAC80KD-V DIE TOPOGRAPHY

DAC80KD-I DIE TOPOGRAPHY

DICE INFORMATION

DAC80/80P

DISCUSSION OF

SPECIFICATIONS

DIGITAL INPUT CODES

The DAC80 accepts complementary binary digital input

codes. The CBI model may be connected by the user for any

one of three complementary codes: CSB, COB, or CTC (see

Table I).

ACCURACY

Linearity of a D/A converter is the true measure of its

performance. The linearity error of the DAC80 is specified

over its entire temperature range. This means that the analog

output will not vary by more than

1/2LSB, maximum, from

an ideal straight line drawn between the end points (inputs

all “1”s and all “0”s) over the specified temperature range of

C to +70

Differential linearity error of a D/A converter is the devia-

tion from an ideal 1LSB voltage change from one adjacent

output state to the next. A differential linearity error speci-

fication of

1/2LSB means that the output voltage step sizes

can range from 1/2LSB to 3/2LSB when the input changes

from one adjacent input state to the next.

Monotonicity over a 0

C to +70

C range is guaranteed in the

DAC80 to insure that the analog output will increase or

remain the same for increasing input digital codes.

DRIFT

Gain Drift is a measure of the change in the full scale range

output over temperature expressed in parts per million per

C (ppm/

C). Gain drift is established by: 1) testing the end

point differences for each DAC80 model at 0

C, +25

C, and

+70

C; 2) calculating the gain error with respect to the 25

value, and; 3) dividing by the temperature change. This

figure is expressed in ppm/

C and is given in the electrical

specifications both with and without internal reference.

Offset Drift is a measure of the actual change in output with

all “1”s on the input over the specified temperature range.

The offset is measured at 0

C, +25

C, and 70

C. The

maximum change in Offset is referenced to the Offset at

C and is divided by the temperature range. This drift is

expressed in parts per million of full scale range per

C (ppm

of FSR/

C).

SETTLING TIME

Settling time for each DAC80 model is the total time

(including slew time) required for the output to settle within

an error band around its final value after a change in input

(see Figure 1).

Voltage Output Models

Three settling times are specified to

0.01% of full scale

range (FSR); two for maximum full scale range changes of

20V, 10V and one for a 1LSB change. The 1LSB change is

measured at the major carry (0111...11 to 1000...00), the

point at which the worst case settling time occurs.

Current Output Models

Two settling times are specified to

0.01% of FSR. Each is

given for current models connected with two different resis-

tive loads: 10

Ω

to 100

Ω

and 1000

Ω

to 1875

Ω

. Internal

resistors are provided for connecting nominal load resis-

tances of approximately 1000

Ω

to 1800

Ω

for output voltage

range of

1V and 0 to –2V (see Figures 11 and 12).

COMPLIANCE

Compliance voltage is the maximum voltage swing allowed

on the current output node in order to maintain specified

accuracy. The maximum compliance voltage of all current

output models is

2.5V. Maximum safe voltage range of

1V and 0 to –2V (see Figures 11 and 12).

POWER SUPPLY SENSITIVITY

Power supply sensitivity is a measure of the effect of a

power supply change on the D/A converter output. It is

defined as a percent of FSR per percent of change in either

the positive or negative supplies about the nominal power

supply voltages (see Figure 2).

REFERENCE SUPPLY

All DAC80 models are supplied with an internal 6.3V

reference voltage supply. This voltage (pin 24) has a toler-

ance of

1% and must be connected to the Reference Input

DIGITAL INPUT

ANALOG OUTPUT

CSB

COB

CTC

(1)

Complementary

Complementary Complementary

Straight

Offset

Two’s

MSB

LSB

Binary

Complement

↓

000000000000

+Full Scale

–1LSB

011111111111

+1/2 Full Scale

Zero

–Full Scale

100000000000

1/2 Full Scale –1LSB

–1LSB

–Full Scale

111111111111

Zero

–Full Scale

Zero

NOTE: (1) Invert the MSB of the COB code with an external inverter to obtain

CTC code.

TABLE I. Digital Input Codes.

FIGURE 1. Full Scale Range Settling Time vs Accuracy.

0.1

Settling Time (µs)

100

Accuracy

Percent of Full-Scale Range (%)

0.3

0.1

0.03

0.01

0.003

0.001

Ω

to 100

Ω

1000

Ω

to 1875

Ω

10k

Ω

Feedback

Ω

Feedback

V Models

I Models

DAC80/80P

(pin 16) for specified operation. This reference may be used

externally also, but external current drain is limited to

2.5mA.

If a varying load is to be driven, an external buffer amplifier

is recommended to drive the load in order to isolate bipolar

offset from load variations. Gain and bipolar offset adjust-

ments should be made under constant load conditions.

LOGIC INPUT COMPATIBILITY

DAC80 digital inputs are TTL, LSTTL and 4000B,

54/74HC CMOS compatible. The input switching threshold

remains at the TTL threshold over the entire supply range.

Logic “0” input current over temperature is low enough to

permit driving DAC80 directly from outputs of 4000B and

54/74C CMOS devices.

OPERATING INSTRUCTIONS

POWER SUPPLY CONNECTIONS

Connect power supply voltages as shown in Figure 3. For

optimum performance and noise rejection, power supply

decoupling capacitors should be added as shown. These

capacitors (1

F tantalum) should be located close to the

DAC80.

12V OPERATION

All DAC80 models can operate over the entire power supply

range of

11.4V to

16.5V. Even with supply levels drop-

ping to

11.4V, the DAC80 can swing a full

10V range,

provided the load current is limited to

2.5mA. With power

supplies greater than

12V,