background image
4-83
File Number
3987.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE™ is a trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
IRFR9120, IRFU9120
5.6A, 100V, 0.600 Ohm, P-Channel Power
MOSFETs
These advanced power MOSFETs are designed, tested, and
guaranteed to withstand a specific level of energy in the
avalanche breakdown mode of operation. They are
P-Channel enhancement mode silicon gate power field
effect transistors designed for applications such as switching
regulators, switching convertors, motor drivers, relay drivers,
and drivers for high power bipolar switching transistors
requiring high speed and low gate-drive power. They can be
operated directly from integrated circuits.
Formerly developmental type TA17501.
Features
• 5.6A, 100V
• r
DS(ON)
= 0.600
• Temperature Compensating PSPICE™ Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
Ordering Information
PART NUMBER
PACKAGE
BRAND
IRFR9120
TO-252AA
IF9120
IRFU9120
TO-251AA
IF9120
NOTE: When ordering use the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, e.g., IRFR91209A.
G
D
S
JEDEC TO-251AA
JEDEC TO-252AA
GATE
SOURCE
DRAIN
DRAIN (FLANGE)
DRAIN (FLANGE)
GATE
SOURCE
Data Sheet
July 1999
background image
4-84
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRFR9120, IRFU9120
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
-100
V
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
-100
V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
±
20
V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
5.6
Refer to Peak Current Curve
A
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Refer to UIS Curve
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
42
0.33
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J,
T
STG
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250
µ
A, V
GS
= 0V
-100
-
-
V
Gate to Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250
µ
A
-2.0
-
-4.0
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= Rated BV
DSS
, V
GS
= 0V
-
-
-25
µ
A
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
C
= 150
o
C
-
-
-250
µ
A
Gate to Source Leakage Current
I
GSS
V
GS
=
±
20V
-
-
±
100
nA
Drain to Source on Resistance (Note 2)
r
DS(ON)
I
D
= 3.4A, V
GS
= -10V, (Figure 9)
-
-
0.600
W
Turn-On Time
t
ON
V
DD
= -50V, I
D
= 6.8A, R
L
= 7.1
,
V
GS
= -10V, R
GS
=18
(Figures 13, 16, 17)
-
-
60
ns
Turn-On Delay Time
t
d(ON)
-
9.6
-
ns
Rise Time
t
r
-
29
-
ns
Turn-Off Delay Time
t
d(OFF)
-
21
-
ns
Fall Time
t
f
-
25
-
ns
Turn-Off Time
t
OFF
-
-
60
ns
Total Gate Charge
Q
g
V
GS
= 0V to -10V
V
DD
= -80V,
I
D
= 5.6A,
R
L
= 14.3
I
G(REF)
= 1.0mA
-
-
18
nC
Gate to Drain Charge
Q
gd
-
-
9
nC
Gate to Source Charge
Q
gs
-
-
3
nC
Input Capacitance
C
ISS
V
DS
= -25V, V
GS
= 0V, f = 1MHz
-
485
-
pF
Output Capacitance
C
OSS
-
170
-
pF
Reverse Transfer Capacitance
C
RSS
-
45
-
pF
Thermal Resistance Junction to Case
R
θ
JC
-
-
3.00
o
C/W
Thermal Resistance Junction to Ambient
R
θ
JA
-
-
100
o
C/W
Source to Drain Diode Ratings and Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Voltage (Note 2)
V
SD
I
SD
= -5.6A
-
-
-6.3
V
Reverse Recovery Time
t
rr
I
SD
= -6.8A, dI
SD
/dt = -100A/
µ
s
-
130
150
ns
Reverse Recovery Charge
Q
RR
-
0.70
1.4
µ
C
NOTES:
2. Pulse test: pulse width
300
µ
s, duty cycle
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3)
IRFR9120, IRFU9120
background image
4-85
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
1.2
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
PO
WER DISSIP
A
TION MUL
TIPLIER
T
C
, CASE TEMPERATURE (
o
C)
-6
-2
-4
-1
0
25
50
75
100
125
150
I
D
,
DRAIN CURRENT (A)
T
C
, CASE TEMPERATURE (
o
C)
-3
-5
t
1
, RECTANGULAR PULSE DURATION (s)
10
-5
10
-3
10
-2
10
-1
10
0
10
1
10
-4
0.01
0.1
1
Z
θ
JC
, TRANSIENT
10
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JC
+ T
C
P
DM
t
1
t
2
0.01
0.02
0.05
0.1
0.2
0.5
THERMAL IMPED
ANCE
-30
-10
-1
-0.1
-1
-10
-100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURRENT (A)
100
µ
s
10ms
100ms
DC
1ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
T
C
= 25
o
C
T
J
= MAX RATED
10
-5
10
1
-10
2
t, PULSE WIDTH (ms)
I
DM
,
PEAK CURRENT (A)
V
GS
= -20V
V
GS
= -10V
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
FOR TEMPERATURES ABOVE 25
o
C
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
I
I
25
150
T
C
125
----------------------
=
-10
1
-10
0
10
-3
10
-2
10
-1
10
0
10
-4
T
C
= 25
o
C
IRFR9120, IRFU9120
background image
4-86
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified (Continued)
-14
-10
-1
0.01
0.1
1
10
t
AV
, TIME IN AVALANCHE (ms)
I
AS
,
A
V
ALANCHE CURRENT (A)
STARTING T
J
= 150
o
C
STARTING T
J
= 25
o
C
E
AS
= 210mJ
CONDITIONS:
V
DD
= -25V, I
AS
= -5.6A,
L = 10mH, STARTING T
J
= 25
o
C
t
AV
= (L) (I
AS
) / (1.3 RATED BV
DSS
- V
DD
)
If R = 0
If R
0
t
AV
= (L/R) ln [(I
AS
*R) / (1.3 RATED BV
DSS
- V
DD
) + 1]
0
0
-2
-4
-6
-8
-10
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= -5V
V
GS
= -6V
V
GS
= -8V
V
GS
= -7V
V
GS
= -10V
-2
-4
-6
-12
V
GS
= -4.5V
V
GS
= -20V
-8
-10
T
C
= 25
o
C
PULSE DURATION = 80
µ
s
DUTY CYCLE = 0.5% MAX
0
-2
-4
-6
-8
-10
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
DS(ON)
, DRAIN T
O
SOURCE CURRENT (A)
0
PULSE DURATION = 80
µ
s
DUTY CYCLE = 0.5% MAX
-55
o
C
150
o
C
25
o
C
-3
-6
-12
-9
V
DD
= -15V
2.0
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED DRAIN T
O
SOURCE
2.5
PULSE DURATION = 80
µ
s
DUTY CYCLE = 0.5% MAX
V
GS
= -10V, I
D
= -3.4A
ON RESIST
ANCE
2.0
1.5
1.0
0.5
0
-80
-40
0
40
80
160
120
THRESHOLD V
O
L
T
A
GE
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED GA
TE
V
GS
= V
DS
, I
D
= -250
µ
A
2.0
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
NORMALIZED DRAIN T
O
SOURCE
BREAKDO
WN V
O
L
T
A
GE
T
J
, JUNCTION TEMPERATURE (
o
C)
I
D
= -250
µ
A
IRFR9120, IRFU9120
background image
4-87
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
FIGURE 16. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified (Continued)
400
300
200
100
0
0
-5
-10
-15
-20
-25
C
, CAP
A
CIT
ANCE (pF)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
600
C
ISS
C
OSS
500
C
RSS
V
GS
= 0V, f = 0.1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
C
DS
+ C
GD
-100
-80
-60
-20
0
-10
-8
-6
-2
0
20
I
G(REF)
I
G(ACT)
80
I
G(REF)
I
G(ACT)
t, TIME (
µ
s)
V
DD
=BV
DSS
V
DD
= BV
DSS
R
L
= 1.2
I
G(REF)
= -1.0mA
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
V
DS
,
DRAIN T
O
SOURCE V
O
L
T
A
GE (V)
V
GS
,
G
A
TE T
O
SOURCE V
O
L
T
A
GE (V)
V
GS
= -10V
-4
-40
t
P
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
GS
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
V
GS
R
L
R
G
DUT
+
-
V
DD
t
d(ON)
t
r
90%
10%
V
DS
90%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
t
ON
10%
0
0
IRFR9120, IRFU9120
background image
4-88
PSPICE Electrical Model
.SUBCKT IRFU9120 2 1 3 REV 9/16/94
CA 12 8 618.9e-12
CB 15 14 633.9e-12
CIN 6 8 441.1e-12
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DPLCAP 10 6 DPLCAPMOD
EBREAK 5 11 17 18 -127.38
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTO 20 6 8 18 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 2.609e-9
LSOURCE 3 7 2.609e-9
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 245.6e-3
RGATE 9 20 2.69
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 123.96e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.77
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/13.2,6))}
.MODEL DBDMOD D (IS=5.1e-14 RS=9.4e-2 TRS1=-2.2e-3 TRS2=-5.2e-6 CJO=6.43e-10 TT=9.7e-8)
.MODEL DBKMOD D (RS=1.45 TRS1=3.84e-4 TRS2=-9.83e-6)
.MODEL DPLCAPMOD D (CJO=235e-12 IS=1e-30 N=10)
.MODEL MOSMOD PMOS (VTO=-3.49 KP=1.58 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.01e-3 TC2=1.05e-6)
.MODEL RDSMOD RES (TC1=6.23e-3 TC2=1.23e-5)
.MODEL RSCLMOD RES (TC1=2.05e-3 TC2=-0.35e-5)
.MODEL RVTOMOD RES (TC1=-3.46e-3 TC2=3.33e-7)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=6.3 VOFF=4.3)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=4.3 VOFF=6.3)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.0 VOFF=-4.0)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4.0 VOFF=1.0)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Tem-
perature Options; written by William J. Hepp and C. Frank Wheatley.
MOS1
10
DPLCAP
RDRAIN
DBREAK
LDRAIN
DRAIN
LSOURCE
DBODY
RSOURCE
EBREAK
MOS2
RIN
CIN
VTO
ESG
CA
EVTO
RGATE
GATE
LGATE
5
2
11
21
8
6
16
20
9
1
18
8
6
8
17
18
+
-
+
-
+
-
+
-
3
SOURCE
RBREAK
RVTO
VBAT
+
-
19
I
T
EDS
EGS
S1A
S2A
S2B