TS272C,I,M
HIGH SPEED CMOS
DUAL OPERATIONAL AMPLIFIERS
August 1998
.
OUTPUT VOLTAGE CAN SWING TO
GROUND
.
EXCELLENT PHASE MARGIN ON
CAPACITIVE LOADS
.
GAIN BANDWIDTH PRODUCT / 3.5MHz
.
STABLE AND LOW OFFSET VOLTAGE
.
THREE INPUT OFFSET VOLTAGE
SELECTIONS
ORDER CODES
Part Number
Temperature
Range
Package
N
D
P
TS272C/AC/BC
0
o
C, +70
o
C
q
q
q
TS272I/AI/BI
-40
o
C, +125
o
C
q
q
q
TS272M/AM/BM
-55
o
C, +125
o
C
q
q
q
Example : TS272ACN
N
DIP8
(Plastic Package)
D
SO8
(Plastic Micropackage)
®
1
2
3
4
5
6
7
8
CC
+
-
-
+
-
+
CC
1 - Output 1
2 - Inverting Input 1
3 - Non-inverting Input 1
4 - V
5 - Non-inverting Input 2
6 - Inverting Input 2
7 - Output 2
8 - V
PIN CONNECTIONS (top view)
DESCRIPTION
The TS272 series are low cost, low power dual
operational amplifiers designed to operate with
single or dual supplies. These operational amplifiers
use the SGS-THOMSON silicon gate CMOS proc-
ess allowing an excellent consumption-speed ratio.
These series are ideally suited for low
consumption applications.
Three power consumptions are available allowing to
have always the best consumption-speed ratio :
q
I
CC
= 10
µ
A/amp. :
TS27L2
(very low power)
q
I
CC
= 150
µ
A/amp. : TS27M2
(low power)
q
I
CC
= 1mA/amp. :
TS272
(high speed)
These CMOS amplifiers offer very high input imped-
ance and extremely low input currents. The major
advantage versus JFET devices is the very low input
currents drift with temperature (see figure 2).
P
TSSOP8
(Thin Shrink Small Outline Package)
1/9
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
+
Supply Voltage - (note 1)
18
V
V
id
Differential Input Voltage - (note 2)
±
18
V
V
i
Input Voltage - (note 3)
-0.3 to 18
V
I
O
Output Current for V
CC
+
≥
15V
±
30
mA
I
in
Input Current
±
5
mA
T
oper
Operating Free-Air Temperature Range
TS272C/AC/BC
TS272I/AI/BI
TS272M/AM/BM
0 to +70
-40 to +125
-55 to +125
o
C
T
stg
Storage Temperature Range
-65 to +150
o
C
Notes : 1. All voltage values, except differential voltage, are with respect to network ground terminal.
2. Differential voltages are at the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage.
E
E
Input
differential
Second
stage
Output
stage
Output
CC
V
CC
V
Current
source
x I
BLOCK DIAGRAM
OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
+
Supply Voltage
3 to 16
V
V
icm
Common Mode Input Voltage Range
0 to V
CC
+
- 1.5
V
TS272C,I,M
2/9
T
T
25
2
T
17
18
R
T
20
T
21
T
T
23
22
In
p
u
t
Out
pu
t
T
24
T
19
V
CC
V
CC
T
26
T
27
T
28
T
29
In
p
u
t
T
3
T
4
T
5
T
2
T
1
R1
C1
T
7
T
6
T
8
T
9
T
13
T
14
T
11
T
12
T
10
T
16
T
15
SCHEMATIC DIAGRAM (for 1/2 TS272)
TS272C,I,M
3/9
ELECTRICAL CHARACTERISTICS
V
CC
+
= +10V, V
CC
-
= 0V, T
amb
= 25
o
C (unless otherwise specified)
Symbol
Parameter
TS272C/AC/BC
TS272I/AI/BI
TS272M/AM/BM
Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
V
io
Input Offset Voltage
V
O
= 1.4V, V
ic
= 0V TS272C/I/M
TS272AC/AI/AM
TS272BC/BI/BM
T
min
.
≤
T
amb
≤
T
max.
TS272C/I/M
TS272AC/AI/AM
TS272BC/BI/BM
1.1
0.9
0.25
10
5
2
12
6.5
3
1.1
0.9
0.25
10
5
2
12
6.5
3.5
mV
DV
io
Input Offset Voltage Drift
2
2
µ
V/
o
C
I
io
Input Offset Current - (note 1)
V
ic
= 5V, V
o
= 5V
T
min
.
≤
T
amb
≤
T
max.
1
100
1
200
pA
I
ib
Input Bias Current - (note 1)
V
ic
= 5V, V
o
= 5V
T
min
.
≤
T
amb
≤
T
max.
1
150
1
300
pA
V
OH
High Level Output Voltage
V
id
= 100mV, R
L
= 10k
Ω
T
min
.
≤
T
amb
≤
T
max.
8.2
8.1
8.4
8.2
8
8.4
V
V
OL
Low Level Output Voltage
V
id
= -100mV
50
50
mV
A
vd
Large Signal Voltage Gain
V
o
= 1V to 6V, R
L
= 10k
Ω
, V
ic
= 5V
T
min
.
≤
T
amb
≤
T
max.
10
7
15
10
6
15
V/mV
GBP
Gain Bandwidth Product
A
v
= 40dB, R
L
= 10k
Ω
, C
L
= 100pF
f
in
= 100kHz
3.5
3.5
MHz
CMR
Common Mode Rejection Ratio
V
o
= 1.4V, V
ic
= 1V to 7.4V
65
80
65
80
dB
SVR
Supply Voltage Rejection Ratio
V
CC
+
= 5V to 10V ,V
o
= 1.4V
60
70
60
70
dB
I
CC
Supply Current (per amplifier)
A
v
= 1, no load, V
o
= 5V
T
min
.
≤
T
amb
≤
T
max.
1000
1500
1600
1000
1500
1700
µ
A
I
o
Output Short Circuit Current
V
id
= 100mV, V
o
= 0V
60
60
mA
I
sink
Output Sink Current
V
id
= -100mV, V
o
= V
CC
45
45
mA
SR
Slew-Rate at Unity Gain
R
L
= 10k
Ω
, C
L
= 100pF, V
i
= 3 to 7V
5.5
5.5
V/
µ
s
∅
m
Phase Margin at Unity Gain
A
v
= 40dB, R
L
= 10k
Ω
, C
L
= 100pF
40
40
Degrees
K
ov
Overshoot Factor
30
30
%
e
n
Equivalent Input Noise Voltage
f = 1kHz, R
S
= 100
Ω
30
30
nV
√
Hz
V
O1
/V
O2
Channel Separation
120
120
dB
Note :
1. Maximum values including unavoidable inaccuracies of the industrial test.
TS272C,I,M
4/9
TYPICAL CHARACTERISTICS
CC
SUPPLY VOLTAGE, V (V)
T = 25˚C
A = 1
V = V / 2
amb
V
2.0
1.5
1.0
0.5
0 4 8 12 16
O CC
CC
S
U
P
P
LY
C
URRE
NT,
I
(m
A
)
Figure 1 : Supply Current (each amplifier)
versus Supply Voltage
25 50 75 100 125
IN
P
U
T
B
IA
S
C
U
R
R
E
N
T
, I
(
p
A
)
IB
100
10
1
CC
ic
V = 10V
V = 5V
amb
TEMPERATURE, T (˚C)
Figure 2 : Input Bias Current versus Free Air
Temperature
5
4
3
2
1
0
-10 -8 -6 -4 -2 0
amb
id
T = 25˚C
V = 100mV
V = 5V
CC
OH
OUTPUT CURRENT, I (mA)
O
U
T
P
U
T
V
O
L
T
AG
E,
V
(V
)
OH
CC
V = 3V
Figure 3a : High Level Output Voltage versus
High Level Output Current
20
16
12
8
4
0
-50 -40 -30 -20 -10 0
amb
id
T = 25˚C
V = 100mV
V = 16V
CC
OUTPUT CURRENT, I (mA)
OH
OH
O
U
T
P
U
T
V
O
L
T
AG
E,
V
(V
)
CC
V = 10V
Figure 3b : IHigh Level Output Voltage versus
High Level Output Current
1.0
0.8
0.6
0.4
0.2
amb
ic
id
T = 25˚C
V = 0.5V
V = -100mV
V = 3V
V = 5V
CC
CC
OL
O
U
T
P
U
T
V
O
L
T
A
G
E
, V
(
V
)
0 1 2 3
OUTPUT CURRENT, I (mA)
OL
Figure 4a : Low Level Output Voltage versus
Low Level Output Current
3
2
1
0 4 8 12 16 20
O
U
TP
U
T
VO
L
T
AG
E,
V
(
V
)
OL
amb
id
i
T = 25˚C
V = 0.5V
V = -100mV
CC
V = 10V
CC
V = 16V
OUTPUT CURRENT, I (mA)
OL
Figure 4b : ILow Level Output Voltage versus
Low Level Output Current
TS272C,I,M
5/9
TYPICAL CHARACTERISTICS (continued)
50
40
30
20
10
0
-10
6
10
10
2
3
10
4
10
5
10
7
10
GA
IN
(
d
B)
P
H
AS
E
(
D
egr
e
e
s)
0
45
90
135
180
FREQUENCY, f (Hz)
T = 25˚C
V = 10V
R = 10k
Ω
C = 100pF
A = 100
amb
CC
L
L
VCL
PHASE
GAIN
Phase
Margin
Gain
Bandwidth
Product
+
Figure 5 : Open Loop Frequency Response and
Phase Shift
5
4
3
2
1
0 4 8 12 16
G
A
IN
BA
N
D
W
.
PR
O
D
.,
G
B
P
(
M
Hz
)
amb
L
L
V
T = 25˚C
R = 10k
Ω
C = 100pF
A = 1
SUPPLY VOLTAGE, V (V)
CC
Figure 6 : Gain Bandwidth Product versus
Supply Voltage
48
44
40
36
32
28
0 4 8 12 16
SUPPLY VOLTAGE, V (V)
CC
amb
L
L
T = 25˚C
R = 10k
Ω
C = 100pF
A = 1
V
P
H
A
S
E M
A
RG
IN
,
m
(
D
egr
ees
)
φ
Figure 7 : Phase Margin versus Supply Voltage
70
60
50
40
30
L
CAPACITANCE, C (pF)
P
H
ASE M
A
R
G
IN
,
m
(
D
e
g
re
e
s
)
φ
20
0
80
100
60
40
T = 25˚C
R = 10k
Ω
A = 1
V = 10V
amb
L
V
CC
Figure 8 : Phase Margin versus Capacitive Load
7
6
5
4
3
2
4 6 8 10 12 14 16
SUPPLY VOLTAGE, V (V)
CC
SLE
W
R
A
T
ES,
S
R
(
V
/
µ
s)
amb
L
L
T = 25˚C
R = 10k
Ω
C = 100pF
SR
SR
Figure 9 : Slew Rates versus Supply Voltage
300
200
100
0
EQUI
VA
LE
N
T
I
N
P
U
T
N
O
IS
E
VO
L
T
A
G
E (
n
V
/VH
z
)
1
10
100
1000
FREQUENCY (Hz)
= 10V
= 25˚C
T
am b
V
CC
= 100
Ω
R
S
Figure 10 : Input Voltage Noise versus Frequency
TS272C,I,M
6/9
PM
-D
IP
8
.EP
S
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC DIP
Dimensions
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
3.32
0.131
a1
0.51
0.020
B
1.15
1.65
0.045
0.065
b
0.356
0.55
0.014
0.022
b1
0.204
0.304
0.008
0.012
D
10.92
0.430
E
7.95
9.75
0.313
0.384
e
2.54
0.100
e3
7.62
0.300
e4
7.62
0.300
F
6.6
0260
i
5.08
0.200
L
3.18
3.81
0.125
0.150
Z
1.52
0.060
SO
8
.T
B
L
TS272C,I,M
7/9
PM
-SO
8
.E
P
S
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC MICROPACKAGE (SO)
Dimensions
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
1.75
0.069
a1
0.1
0.25
0.004
0.010
a2
1.65
0.065
a3
0.65
0.85
0.026
0.033
b
0.35
0.48
0.014
0.019
b1
0.19
0.25
0.007
0.010
C
0.25
0.5
0.010
0.020
c1
45
o
(typ.)
D
4.8
5.0
0.189
0.197
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
3.81
0.150
F
3.8
4.0
0.150
0.157
L
0.4
1.27
0.016
0.050
M
0.6
0.024
S
8
o
(max.)
SO
8
.T
B