This Datasheet states Saifun's current technical specifications regarding the Products described herein. This Datasheet
may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication# 1908 Rev: 1 Amendment: 1
Issue Date: 26 August 2003
SA24C1024
Datasheet
Features
•
=
Saifun NROM™ NVM Technology
•
=
Operating voltage: 2.7V to 3.6V
•
=
Clock frequency: 100/400/1700/3400 kHz
•
=
Low power consumption
–
0.5
µµµµ
A standby current typical (L version)
–
<0.2
µµµµ
A standby current typical (LZ version)
•
=
Write Modes
–
Byte Mode
–
Page Mode (128 Bytes/Page)
•
=
Schmitt trigger inputs
•
=
Hardware and software write protection for entire or partial array
•
=
Endurance: up to 1 million data changes
•
=
Data Retention: Greater than 40 years
•
=
Packages: 8-Pin DIP and 8-Pin SOIC and MLF Leadless
•
=
Temperature range
–
Commercial: 0 °C to +70 °C
–
Industrial (E): -40 °C to +85 °C
1024Kb EEPROM
IIC
http://www.saifun.com
Saifun NROM
TM
is a trademark of Saifun Semiconductors Ltd.
SA24C1024 Datasheet
SAIFUN
2
General Description
The SA24C1024 is a 1024Kbit CMOS non-
volatile serial EEPROM organized as 128K
x 8 bit memory. This device conforms to
Extended IIC 2-wire protocol, which
enables accessing of memory in excess of
16 Kbits on an IIC bus. This serial
communication protocol uses a Clock
signal (SCL) and a Data signal (SDA) to
synchronously clock data between a
Master (for example, a microcontroller) and
a Slave (EEPROM).
The SA24C1024 offers hardware write
protection whereby the entire memory
array can be write-protected by pulling the
WP pin to logic HIGH. The entire memory
then becomes unalterable until the WP pin
is switched to logic LOW. The device also
features programmable write protect with
options of full, half or a quadrant of the
array.
The LZ version of the SA24C1024 offers
very low standby current, which makes it
suitable for low power applications. The
SA24C1024 is designed to minimize pin
count and simplify PC board layout
requirements. This device is offered in both
SO and DIP packages. A leadless
microleadframe package and CSP are
under development.
Saifun’s EEPROMs are designed and
tested for applications requiring high
endurance, high reliability and low power
consumption.
SA24C1024 Datasheet
SAIFUN
3
Table of Contents
Features ......................................................................... 1
General Description ...................................................... 2
Block Diagram ............................................................... 4
Connection Diagrams ................................................... 5
Ordering Information .................................................... 6
Product Specifications ................................................. 7
Absolute Maximum Ratings Operating Conditions... 7
ESD/Latch up Specification (JEDEC 8 Spec) ........... 7
Operating Conditions............................................... 7
V
CC
(2.7 V to 3.6 V) DC Electrical Characteristics ... 8
Capacitance ............................................................ 8
AC Test Conditions ................................................. 9
AC Testing Input/Output Waveforms....................... 9
AC Characteristics (V
CC
2.7 V – 3.6 V).................... 9
Bus Timing ............................................................ 10
Write Cycle Timing ................................................ 11
Typical System Configuration................................ 11
Background Information (IIC Bus) ............................. 12
Slave Address ....................................................... 12
Device Type .......................................................... 13
Device/Page Block Selection................................. 13
Read/Write Bit....................................................... 13
Acknowledge......................................................... 13
Array Address#1.................................................... 13
Array Address#0.................................................... 13
Pin Descriptions.......................................................... 14
Serial Clock (SCL)................................................. 14
Serial Data (SDA).................................................. 14
Write Protect (WP) ................................................ 14
Choice 1: Full Array Write Protect ................. 14
Device Selection Input – A1 (as Appropriate) ........ 14
Choice 2: Programmable Write Protect
Device Operation......................................................... 16
Clock and Data Conventions ................................. 16
START Condition .................................................. 16
STOP Condition .................................................... 16
SA24C1024 Array Addressing............................... 16
Write Operations ......................................................... 18
Byte Write ............................................................. 18
Page Write ............................................................ 18
Acknowledge Polling ............................................. 19
Write Protection .................................................... 19
Read Operations ......................................................... 20
Current Address Read........................................... 20
Random Read ....................................................... 20
Sequential Read.................................................... 20
Switching from Standard/Fast Modes to High-speed
Mode and Back ....................................................... 22
Physical Dimensions................................................... 24
Contact Information .................................................... 27
Life Support Policy...................................................... 27
List of Figures
Figure 1. SA24C1024 Block Diagram.............................. 4
Figure 2. SO Package (MW), Dual Inline (N) – Top View 5
Figure 3. Leadless Package (MLF) – Top View ............... 5
Figure 4. SA24C1024 Ordering Information..................... 6
Figure 5. AC Testing Input/Output Waveforms ................ 9
Figure 6. Bus Timing ..................................................... 10
Figure 7. Write Cycle Timing ......................................... 11
Figure 8. Typical System Configuration......................... 11
Figure 9. Slave Address ................................................ 12
Figure 10. Data Validity ................................................. 17
Figure 11. START and STOP Definition ........................ 17
Figure 12. Acknowledge Response from Receiver ........ 17
Figure 13. Byte Write .................................................... 19
Figure 14. Page Write ................................................... 19
Figure 15. Current Address Read.................................. 21
Figure 16. Random Read .............................................. 21
Figure 17. Sequential Read........................................... 21
Figure 18. Data Transfer ............................................... 22
Figure 19. A Complete HS Mode Transfer..................... 23
Figure 20. 8-pin Molded Small Outline Package (MW8),
Package Number M08D ...................................... 24
Figure 21. Molded Dual-in-Line Package (N), Package
Number N08E...................................................... 25
Figure 22. 8-pin MLF Leadless Package ....................... 26
List of Tables
Table 1. Pin Names......................................................... 5
Table 2. Write Protection Truth Table............................ 14
SA24C1024 Datasheet
SAIFUN
4
Block Diagram
Figure 1. SA24C1024 Block Diagram
SA24C1024 Datasheet
SAIFUN
5
Connection Diagrams
SA24C1024
1
2
3
4
8
7
6
5
NC
A1
NC
V
SS
V
CC
WP
SCL
SDA
SA24C1024
1
2
3
4
8
7
6
5
NC
A1
NC
V
SS
V
CC
SCL
SDA
Figure 2. SO Package (MW), Dual Inline (N) – Top
View
Figure 3. Leadless Package (MLF) – Top View
Note:
For more details, refer to package number N08E and M08D.
Table 1. Pin Names
Symbol
Pin Name
Description
NC Not
Connected
A1
Device Select Address Input
Pin
Has an internal "weak" pulldown, and assumes logic LOW
when left unconnected.
NC Not
Connected
V
SS
Device Ground Input Pin
SDA
IIC Data Input/Output Pin
Open Collector/Drain type.
SCL
IIC Clock Input Pin
WP
Write Protect
Has an internal "weak" pulldown, and assumes logic LOW
when left unconnected.
When LOW, writing is allowed to the memory array.
When HIGH, writing is not allowed to the memory array, as
defined in Write Protect (WP), page 14.
V
CC
Device Power Input Pin
2.7 V to 3.6 V
Note:
No A2 or A0 pins (Pins 2 and 3) are provided, and are instead treated as Not
Connected. Internal address comparison assumes pin A2 to be 0, and so the
command code should have its corresponding A2 bit set to 0 as well. The
command code should also have its corresponding A0 bit set to add16 (MSB
address bit).
SA24C1024 Datasheet
SAIFUN
6
Ordering Information
LZ
XX
C
24
SA
Letter
L
LZ
1024
C
24
SA
Interface
Density
Voltage Operating Range
Description
2.7 V to 3.6 V
2.7 V to 3.6 V
< 0.7
µ
A Standby Current
1 Mb with Write Protect
CMOS EEPROM
Technology
IIC - 2 Wire
Saifun Non-Volatile
Memory
X
Blank
X
Tube
Tape and Reel
PP
Package
N
MW
MF
8-pin DIP
8-pin SOIC (200 mil)
8-lead MLF
F
Blank
F
Non-lead Free
Lead-free Leads
E
Blank
E
Temp. Range
0 to 70 C
-40 to +85 C
o
o
Figure 4. SA24C1024 Ordering Information
SA24C1024 Datasheet
SAIFUN
7
Product Specifications
Absolute Maximum Ratings Operating Conditions
Ambient Storage Temperature
–65
°
C to +150
°
C
All Input or Output Voltages with
Respect to Ground
4.5 V to -0.3 V
Lead Temperature
(Soldering, 10 seconds)
+300
°
C
ESD Rating
2000 V min.
ESD/Latch up Specification (JEDEC 8 Spec)
Human Body Model
Minimum 2 KV
Machine Model
Minimum 500 V
Latch up
100 mA on all pins, +125
°
C
Operating Conditions
Ambient Operating Temperature:
•
= SA24C1024
•
= SA24C1024E
0
°
C to +70
°
C
–40
°
C to +85
°
C
Positive Power Supply:
•
= SA24C1024
•
= SA24C1024LZ
2.7 V to 3.6 V
2.7 V to 3.6 V
SA24C1024 Datasheet
SAIFUN
8
V
CC
(2.7 V to 3.6 V) DC Electrical Characteristics
Limits
Symbol
Parameter
Test Conditions
Min
Typ
(Notes)
Max
Units
f
SCL
= 100 kHz (Read)
2
3
mA
f
SCL
= 100 kHz (Write)
8
11
mA
f
SCL
= 400 KHZ (Read)
2
3
mA
f
SCL
= 400 kHz (Write)
8
11
mA
f
SCL
= 1.7 MHz (Read)
5
7
mA
f
SCL
= 1.7 MHz (Write)
8
11
mA
f
SCL
= 3.4 MHz (Read)
5 7
mA
I
CCA
Active Power Supply
Current
f
SCL
= 3.4 MHz (Write)
8 11
mA
I
SB
Standby Current (L)
V
IN
=
GND
or
V
CC
0.5 1
µ
A
Standby
Current
(LZ)
V
IN
=
GND
or
V
CC
0.2
0.7
µ
A
=
I
IL
Input
Leakage
Current
V
IN
= GND
to
V
CC
0.1 1
µ
A
I
OL
Output
Leakage
Current
V
OUT
=
GND
to
V
CC
0.1 1
µ
A
V
IL
Input Low Voltage
-0.3 V
CC
x
0.3 V
V
IH
Input High Voltage
V
CC
*
0.7
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 3 mA
0.4 V
Notes:
(1) Typical values are TA = +25
°
C and nominal supply voltage of 3 V.
(2) Write frequency is 50 Hz.
Capacitance
T
A
= +25
°
C, f = 100/400 kHz/1.7 MHz/3.4 MHz, V
CC
= 3V
(see note 2)
Symbol
Test
Conditions
Max
Units
C
I/O
Input/Output Capacitance (SDA)
V
I/O
= 0 V
8
pF
C
IN
Input Capacitance (A0, A1, A2, SCL)
V
IN
= 0 V
6
pF
Notes:
(1) This parameter is periodically sampled and not 100% tested.
(2) Typical values are T
A
= +25
°
C and nominal supply voltage of 3 V.
SA24C1024 Datasheet
SAIFUN
9
AC Test Conditions
Input Pulse Levels
VCC * 0.1 to VCC * 0.9
Input Rise and Fall
Times
10 ns
Input & Output Timing
Levels
VCC * 0.3 to VCC * 0.7
Output Load
1 TTL Gate and CL = 100
pF
AC Testing Input/Output Waveforms
Figure 5. AC Testing Input/Output Waveforms
AC Characteristics (V
CC
2.7 V – 3.6 V)
100 kHz
400 kHz
1.7 MHz
3.4 MHz
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Min
Max
Units
f
SCL
SCL Clock
Frequency
100 400
1700 3400 kHz
t
LOW
Clock Low Period
4700
1300
320
160
ns
t
HIGH
Clock High Period
4000
600
120
60
ns
tSU:STA
Start Condition
Setup Time (for a
repeated START
condition)
4700 600
160 160 ns
t
HD:STA
Start Condition
Hold Time (for a
repeated START
condition)
4000 600
160 160 ns
t
SU:STO
Stop Condition
Setup Time
4000 600
160 160 ns
t
RDA
SDA Rise Time
(depend on
external pullup)
1000 300 20 170 10 85 ns
t
FDA
SDA Fall Time
300
300
20
170
10
85
ns
t
RCL
SCL Rise Time
(depend on
external pullup)
1000 300 20 80 10 40 ns
t
FCL
SCL Fall Time
300
300
20
80
10
40
ns
SA24C1024 Datasheet
SAIFUN
10
100 kHz
400 kHz
1.7 MHz
3.4 MHz
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Min
Max
Units
t
RCL1
SCL Rise Time
(after repeated
START or after
ACK bit)
N/A
N/A
N/A
20 160 10 80 ns
t
SU:DAT
Data In Setup Time
250
100
20
20
ns
t
HD:DAT
Data In Hold Time
0
0
0
0
ns
t
DH
Data Out Hold Time
200
100
0
0
ns
T
I
Noise Suppression
Time Constant at
SCL, SDA Inputs
(minimum V
IN
pulse
width)
50 50 10 10 ns
t
AA
SCL Low to SDA
Data Out Valid
300
1
3500 100
1
900
0 170 0 85 ns
t
BUF
Time the Bus Must
Be Free Before a
New Transmission
Can Start
4700 1300
320 160 ns
t
WR
Write
Cycle
Time 10 10 10 10 ms
Endurance
1
Million
2
Cycles
1
The minimum value is defined in order to bridge the undefined part between V
IH
and V
IL
of the falling edge of SCL. The standard
value is 0 ns.
2
This parameter is not tested but ensured by characterization.
Bus Timing
Figure 6. Bus Timing
SA24C1024 Datasheet
SAIFUN
11
Write Cycle Timing
Figure 7. Write Cycle Timing
Note:
The write cycle time (t
WR
) is the time from a valid STOP condition of a Write
sequence to the end of the internal erase/program cycle.
Typical System Configuration
Figure 8. Typical System Configuration
Note:
Due to the open drain configuration of SDA and SCL, a bus-level pullup resistor
is called for (typical value = 4.7 k
Ω
).
SA24C1024 Datasheet
SAIFUN
12
Background Information
(IIC Bus)
Extended IIC specification is an extension
of the Standard IIC specification, which
enables addressing of EEPROMs with
more than 15 Kbits of memory on an IIC
bus. The difference between the two
specifications is that the Extended IIC
specification defines two bytes of Array
Address information, while the Standard
IIC specification defines only one. All other
aspects are identical between the two
specifications. Using two bytes of the array
address, one Device/Page Block selection