DATA SHEET
Preliminary specification
File under Integrated Circuits, IC02
1997 Jul 07
INTEGRATED CIRCUITS
SAA5x9x family
Economy teletext and TV
microcontrollers
1997 Jul 07
2
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
CONTENTS
1
FEATURES
1.1
General
1.2
Microcontroller
1.3
Teletext acquisition
1.4
Teletext Display
1.5
Additional features of SAA529xA devices
1.6
Additional features of SAA549x devices
2
GENERAL DESCRIPTION
3
ORDERING INFORMATION
4
QUICK REFERENCE DATA
5
BLOCK DIAGRAM
6
PINNING INFORMATION
6.1
Pinning
6.2
Pin description
7
FUNCTIONAL DESCRIPTION
7.1
Microcontroller
7.2
80C51 Features not supported
7.3
Additional features
7.4
Microcontroller interfacing
8
TELETEXT DECODER
8.1
Data slicer
8.2
Acquisition timing
8.3
Teletext acquisition
8.4
Rolling headers and time
8.5
Error checking
8.6
Memory organisation of SAA5296/7,
SAA5296/7A and SAA5496/7
8.7
Inventory page
8.8
Memory Organisation of SAA5291, SAA5291A
and SAA5491
8.9
Packet 26 processing
8.10
VPS
8.11
Wide Screen Signalling (SAA529xA and
SAA549x only)
8.12
525-line world system teletext
8.13
Fastext detection
8.14
Page clearing
8.15
Full channel operation
8.16
Independent data services (SAA5291,
SAA5291A, SAA5491 only)
9
THE DISPLAY
9.1
Introduction
9.2
Character matrix
9.3
East/West selection
9.4
National option characters
9.5
The twist attribute
9.6
On Screen Display symbols
9.7
Language group identification
9.8
525-line operation
9.9
On Screen Display characters
9.10
Control characters
9.11
Quadruple width display (SAA549x)
9.12
Page attributes
9.13
Display modes
9.14
On Screen Display boxes
9.15
Screen colour
9.16
Redefinable Colours (SAA549x)
9.17
Cursor
9.18
Other display features
9.19
Display timing
9.20
Horizontal timing
9.21
Vertical timing
9.22
Display position
9.23
Clock generator
10
CHARACTER SETS
10.1
Pan-European
10.2
Russian
10.3
Greek/Turkish
10.4
Arabic/English/French
10.5
Thai
10.6
Arabic/Hebrew
11
LIMITING VALUES
12
CHARACTERISTICS
13
CHARACTERISTICS FOR THE I
2
C-BUS
INTERFACE
14
QUALITY SPECIFICATIONS
15
APPLICATION INFORMATION
16
EMC GUIDELINES
17
PACKAGE OUTLINES
18
SOLDERING
18.1
Introduction
18.2
SDIP
18.3
QFP
19
DEFINITIONS
20
LIFE SUPPORT APPLICATIONS
21
PURCHASE OF PHILIPS I
2
C COMPONENTS
1997 Jul 07
3
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
1
FEATURES
1.1
General
•
Single chip microcontroller with integrated teletext
decoder
•
Single +5 V power supply
•
Single crystal oscillator for teletext decoder, display and
microcontroller
•
Teletext function can be powered-down independently
of microcontroller function for reduced power
consumption in stand-by
•
Pin compatibility throughout family.
1.2
Microcontroller
•
80C51 microcontroller core
•
16/32/64 kbyte mask programmed ROM
•
256/768/1280 bytes of microcontroller RAM
•
Eight 6-bit Pulse Width Modulator (PWM) outputs for
control of TV analog signals
•
One 14-bit PWM for Voltage Synthesis Tuner control
•
Four 8-bit Analog-to-Digital converters
•
2 high current open-drain outputs for directly driving
LED’s etc.
•
I
2
C-bus interface
•
External ROM and RAM capability on QFP80 package
version.
1.3
Teletext acquisition
•
1 page and 10 page Teletext version
•
Acquisition of 525-line and 625-line World System
Teletext, with automatic selection
•
Acquisition and decoding of VPS data (PDC system A)
•
Page clearing in under 64
µ
s (1 TV line)
•
Separate storage of extension packets
(SAA5296/7, SAA5296/7A and SAA5496/7)
•
Inventory of transmitted Teletext pages stored in the
Transmitted Page Table (TPT) and Subtitle Page Table
(SPT) (SAA5296/7, SAA5296/7A and SAA5496/7)
•
Automatic detection of FASTEXT transmission
•
Real-time packet 26 engine for processing accented
(and other) characters
•
Comprehensive Teletext language coverage
•
Video signal quality detector.
1.4
Teletext Display
•
525-line and 625-line display
•
12
×
10 character matrix
•
Double height, width and size On-Screen Display (OSD)
•
Definable border colour
•
Enhanced display features including meshing and
shadowing
•
260 characters in mask programmed ROM
•
Automatic FRAME output control with manual override
•
RGB push pull output to standard decoder ICs
•
Stable display via slave synchronisation to Horizontal
Sync and Vertical Sync.
1.5
Additional features of SAA529xA devices
•
Wide Screen Signalling (WSS) bit decoding (line 23).
1.6
Additional features of SAA549x devices
•
Wide Screen Signalling bit decoding (line 23)
•
Quad width OSD capability
•
32 additional OSD characters in mask programmed
ROM
•
8 foreground and 8 background colours definable from a
palette of 64.
2
GENERAL DESCRIPTION
The SAA529x, SAA529xA and SAA549x family of
microcontrollers are a derivative of the Philips’
industry-standard 80C51 microcontroller and are intended
for use as the central control mechanism in a television
receiver. They provide control functions for the television
system and include an integrated teletext function.
The teletext hardware has the capability of decoding and
displaying both 525-line and 625-line World System
Teletext. The same display hardware is used both for
Teletext and On-Screen Display, which means that the
display features give greater flexibility to differentiate the
TV set.
The family offers both 1 page and 10 page Teletext
capability, in a range of ROM sizes. Increasing display
capability is offered from the SAA5290 to the SAA5497.
1997 Jul 07
4
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
3
ORDERING INFORMATION
Note
1. ‘nnn’ is a three-digit number uniquely referencing the microcontroller program mask and OSD mask.
4
QUICK REFERENCE DATA
TYPE NUMBER
(1)
PACKAGE
PROGRAM
MEMORY (ROM)
NAME
DESCRIPTION
VERSION
SAA5290PS/nnn
SDIP52 plastic shrink dual in-line package; 52 leads
(600 mil)
SOT247-1 16 kbytes
SAA5291PS/nnn
SDIP52
plastic shrink dual in-line package; 52 leads
(600 mil)
SOT247-1 32 kbytes
SAA5291APS/nnn
SAA5296PS/nnn
SAA5296APS/nnn
SAA5491PS/nnn
SAA5496PS/nnn
SAA5291H/nnn
QFP80
plastic quad flat package; 80 leads (lead length
1.95 mm); body 14
×
20
×
2.8 mm
SOT318-2 32 kbytes and external
SAA5291AH/nnn
SAA5296H/nnn
SAA5296AH/nnn
SAA5491H/nnn
SAA5496H/nnn
SAA5297PS/nnn
SDIP52
plastic shrink dual in-line package; 52 leads
(600 mil)
SOT247-1 64 kbytes
SAA5297APS/nnn
SAA5497PS/nnn
SAA5297H/nnn
QFP80
plastic quad flat package; 80 leads (lead length
1.95 mm); body 14
×
20
×
2.8 mm
SOT318-2 64 kbytes or external
SAA5297AH/nnn
SAA5497H/nnn
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
DDA
supply voltages
4.5
5.0
5.5
V
V
DDM
V
DDT
f
xtal
crystal frequency
−
12
−
MHz
T
amb
operating ambient temperature
−
20
−
+70
°
C
I
DDM
microcontroller supply current
−
20
35
mA
SAA5290, SAA5291, SAA5291A and SAA5491
I
DDA
analog supply current
−
35
50
mA
I
DDT
teletext supply current
−
40
65
mA
SAA5296, SAA5296A, SAA5297, SAA5297A, SAA5496 and SAA5497
I
DDA
analog supply current
−
35
50
mA
I
DDT
teletext supply current
−
50
80
mA
1997 Jul 07
5
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
5
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MGK462
PORT 1
PORT 0
PORT 3
PORT 2
TIMER/
CTRS
I
2
C-BUS
INTERFACE
ADC
SAA5x9x
PWM
8051
MICRO-
CONTROLLER
OSCILLATOR
TEXT
INTERFACE
512
×
8
AUX RAM
256
×
8
RAM
32K
×
8
ROM
ACQUISITION
TIMING
PAGE
RAM
DISPLAY
TIMING
DATA SLICER
DISPLAY
TELETEXT
ACQUISITION
BLACK
IREF
VDDA VDDM VDDT VSSA VSSD
CVBS0,
CVBS1
RESET
P1.0 to P1.7
P0.0 to P0.7
P3.0 to P3.7
P2.0 to P2.7
XTALIN
XTALOUT
OSCGND
VSYNC
HSYNC
FRAME
R, G, B,
VDS,
COR
data
address
int
1997 Jul 07
6
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
6
PINNING INFORMATION
6.1
Pinning
Fig.2 Pin configuration (SDIP52).
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
13
40
39
38
37
36
35
34
33
32
31
30
29
28
27
14
15
16
17
18
19
20
22
23
24
25
26
21
42
41
43
44
45
46
47
48
49
50
51
52
MGK461
SAA5x9x
P2.0/TPWM
P2.1/PWM0
P2.2/PWM1
P2.3/PWM2
P2.4/PWM3
P2.5/PWM4
P2.6/PWM5
P2.7/PWM6
P3.0/ADC0
P3.1/ADC1
P3.2/ADC2
P3.3/ADC3
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
CVBS0
CVBS1
BLACK
IREF
VSSD
DDM
V
DDT
V
DDA
V
VSSD
SSA
V
P1.5
P1.4
P1.7/SDA
P1.6/SCL
P1.3/T1
P1.2/INT0
P1.1/T0
P1.0/INT1
RESET
XTALOUT
XTALIN
OSCGND
VSYNC
HSYNC
VDS
R
G
B
RGBREF
P3.4/PWM7
COR
FRAME
1997 Jul 07
7
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
Fig.3 Pin configuration (QFP80).
handbook, full pagewidth
SAA5x9x
MGL157
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
P2.6/PWM5
P2.7/PWM6
P3.0/ADC0
n.c.
P3.1/ADC1
P3.2/ADC2
P3.3/ADC3
P2.5/PWM4
P2.4/PWM3
RD
WR
VSSD
EA
P0.0
P0.1
P0.2
PSEN
ALE
REF
−
P0.3
P1.2/INT0
RESET
XTALOUT
XTALIN
OSCGND
A8
A9
A10
A11
VDDT
REF
+
VDDA
P3.6
VSYNC
P3.5
HSYNC
P3.4/PWM7
VDS
R
G
60
59
58
57
56
P1.1/T0
P1.0/INT1
VDDM
P1.3/T1
64
63
62
61
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
P0.6
P0.7
V
SSA
CVBS0
CVBS1
BLACK
IREF
A15
A14
A13
A12
FRAME
V
SSD
COR
RGBREF
B
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
P2.3/PWM2
P2.2/PWM1
P2.1/PWM0
P2.0/TPWM
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
P1.5
P1.4
P1.7/SDA
P1.6/SCL
21
22
23
24
P0.4
P3.7
n.c.
P0.5
1997 Jul 07
8
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
6.2
Pin description
Table 1
SDIP52 and QFP80 packages
SYMBOL
PIN
DESCRIPTION
SDIP52
QFP80
P2.0/TPWM
1
77
Port 2: 8-bit open-drain bidirectional port with alternative functions.
P2.0/TPWM is the output for the 14-bit high precision PWM.
P2.1/PWM0 to P2.7/PWM6 are the outputs for the 6-bit PWMs 0 to 6.
P2.1/PWM0
2
78
P2.2/PWM1
3
79
P2.3/PWM2
4
80
P2.4/PWM3
5
9
P2.5/PWM4
6
8
P2.6/PWM5
7
1
P2.7/PWM6
8
2
P3.0/ADC0
9
3
Port 3: 8-bit open-drain bidirectional port with alternative functions.
P3.0/ADC0 to P3.3/ADC3 are the inputs for the software ADC facility.
P3.4/PWM7 is the output for the 6-bit PWM7.
P3.1/ADC1
10
5
P3.2/ADC2
11
6
P3.3/ADC3
12
7
P3.4/PWM7
30
44
P3.5
−
46
P3.6
−
48
P3.7
−
22
V
SSD
13
12
Digital ground.
P0.0
14
14
Port 0: 8-bit open-drain bidirectional port.
P0.5 and P0.6 have 10 mA current sinking capability for direct drive of LEDs.
P0.1
15
15
P0.2
16
16
P0.3
17
20
P0.4
18
21
P0.5
19
24
P0.6
20
25
P0.7
21
26
V
SSA
22
27
Analog ground.
CVBS0
23
28
Composite video inputs; a positive-going 1 V (peak-to-peak) input is required,
connected via a 100 nF capacitor.
CVBS1
24
29
BLACK
25
30
Video black level storage input: this pin should be connected to V
SSA
via a
100 nF capacitor.
IREF
26
31
Reference current input for analog circuits, connected to V
SSA
via a 27 k
Ω
resistor.
FRAME
27
36
De-interlace output synchronised with the VSYNC pulse to produce a
non-interlaced display by adjustment of the vertical deflection circuits.
V
SSD
28
37
Internally connected; this pin should be connected to digital ground.
COR
29
38
Open-drain, active LOW output which allows selective contrast reduction of
the TV picture to enhance a mixed mode display.
1997 Jul 07
9
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
LRGBREF
31
39
DC input voltage to define the output HIGH level on the RGB pins.
B
32
40
Pixel rate output of the BLUE colour information.
G
33
41
Pixel rate output of the GREEN colour information.
R
34
42
Pixel rate output of the RED colour information.
VDS
35
43
Video/data switch push-pull output for dot rate fast blanking.
HSYNC
36
45
Schmitt trigger input for a TTL level version of the horizontal sync pulse; the
polarity of this pulse is programmable by register bit TXT1.H POLARITY.
VSYNC
37
47
Schmitt trigger input for a TTL level version of the vertical sync pulse;
the polarity of this pulse is programmable by register bit TXT1.V POLARITY.
V
DDA
38
49
+5 V analog power supply.
V
DDT
39
51
+5 V teletext power supply.
OSCGND
40
56
Crystal oscillator ground.
XTALIN
41
57
12 MHz crystal oscillator input.
XTALOUT
42
58
12 MHz crystal oscillator output.
RESET
43
59
If the reset input is HIGH for at least 3 machine cycles (36 oscillator periods)
while the oscillator is running, the device is reset; this pin should be
connected to V
DDM
via a 2.2
µ
F capacitor.
V
DDM
44
62
+5 V microcontroller power supply.
P1.0/INT1
45
63
Port 1: 8-bit open-drain bidirectional port with alternate functions.
P1.0/INT1 is external interrupt 1 which can be triggered on the rising and
falling edge of the pulse.
P1.1/T0 is the counter/timer 0.
P1.2/INT0 is external interrupt 0.
P1.3/T1 is the counter/timer 1.
P1.6/SCL is the serial clock input for the I
2
C-bus.
P1.7/SDA is the serial data port for the I
2
C-bus.
P1.1/T0
46
64
P1.2/INT0
47
60
P1.3/INT1
48
61
P1.6/SCL
49
65
P1.7/SDA
50
66
P1.4
51
67
P1.5
52
68
REF+
−
50
Positive reference voltage for software driven ADC.
REF
−
−
19
Negative reference voltage for software driven ADC.
RD
−
10
Read control signal to external Data Memory.
WR
−
11
Write control signal to external Data Memory.
PSEN
−
17
Enable signal for external Program Memory.
ALE
−
18
External latch enable signal; active HIGH.
EA
−
13
Control signal used to select external (LOW) or internal (HIGH) Program
Memory.
AD0 to AD7
−
69 to 76
Address lines A0 to A7 multiplexed with data lines D0 to D7.
A8 to A15
−
55 to 52,
35 to 32
Address lines A8 to A15.
SYMBOL
PIN
DESCRIPTION
SDIP52
QFP80
1997 Jul 07
10
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
7
FUNCTIONAL DESCRIPTION
7.1
Microcontroller
The functionality of the microcontroller used in this family
is described here with reference to the industry-standard
80C51 microcontroller. A full description of its functionality
can be found in the
“80C51-Based 8-Bit Microcontrollers;
Data Handbook IC20”. Using the 80C51 as a reference,
the changes made to this family fall into two categories:
•
Features not supported by the SAA529x, SAA529xA or
SAA549x devices
•
Features found on the SAA529x, SAA529xA or
SAA549x devices but not supported by the 80C51.
7.2
80C51 features not supported
7.2.1
I
NTERRUPT PRIORITY
The IP SFR is not implemented and all interrupts are
treated with the same priority level. The normal
prioritisation of interrupts is maintained within the level.
Table 2
Interrupts and vectors address
Note
1. SAA5290, SAA5291, SAA5291A and SAA5491 only.
7.2.2
O
FF
-
CHIP MEMORY
The SDIP52 version does not support the use of off-chip
program memory or off-chip data memory.
7.2.3
I
DLE AND
P
OWER
-
DOWN MODES
As Idle and Power-down modes are not supported, their
respective bits in PCON are not available.
7.2.4
UART F
UNCTION
The 80C51 UART is not available. As a consequence the
SCON and SBUF SFRs are removed and the ES bit in the
IE SFR is unavailable.
INTERRUPT SOURCE
VECTOR ADDRESS
Reset
000H
External INT0
003H
Timer 0
00BH
External INT1
013H
Timer 1
01BH
Byte I
2
C-bus
02BH
Bit I
2
C-bus; note 1
053H
7.3
Additional features
The following features are provided in addition to the
standard 80C51 features.
7.3.1
I
NTERRUPTS
The external INT1 interrupt is modified to generate an