DATA SHEET
Product specification
Supersedes data of 1995 Jul 13
File under Integrated Circuits, IC20
1997 Mar 14
INTEGRATED CIRCUITS
P83CL781; P83CL782
Low voltage 8-bit microcontrollers
with UART and I
2
C-bus
1997 Mar 14
2
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
CONTENTS
1
FEATURES
2
GENERAL DESCRIPTION
3
APPLICATIONS
4
ORDERING INFORMATION
5
BLOCK DIAGRAM
6
FUNCTIONAL DIAGRAM
7
PINNING INFORMATION
7.1
Pinning
7.2
Pin description
8
FUNCTIONAL DESCRIPTION OVERVIEW
8.1
General
8.2
CPU timing
9
MEMORY ORGANIZATION
9.1
Program memory
9.2
Data memory
9.3
Special Function Registers
9.4
Addressing
10
I/O FACILITIES
10.1
Ports
10.2
Port options
10.3
Port 0 options
10.4
SET/RESET options
11
TIMER/EVENT COUNTERS
11.1
Timer 0 and Timer 1
11.2
Timer T2
11.3
Timer/Counter 2 Control Register (T2CON)
12
REDUCED POWER MODES
12.1
Idle mode
12.2
Power-down mode
12.3
Wake-up from Power-down mode
12.4
Status of external pins
12.5
Power Control Register (PCON)
13
I
2
C-BUS SERIAL I/O
13.1
Serial Control Register (S1CON)
13.2
Serial Status Register (S1STA)
13.3
Data Shift Register (S1DAT)
13.4
Address Register (S1ADR)
14
STANDARD SERIAL INTERFACE SIO0: UART
14.1
Multiprocessor communications
14.2
Serial Port Control and Status Register
(S0CON)
14.3
Baud rates
15
INTERRUPT SYSTEM
15.1
External interrupts INT2 to INT9
15.2
Interrupt priority
15.3
Interrupt registers
16
OSCILLATOR CIRCUITRY
17
RESET
17.1
External reset using the RST pin
17.2
Power-on reset
18
SPECIAL FUNCTION REGISTERS
OVERVIEW
19
INSTRUCTION SET
20
LIMITING VALUES
21
DC CHARACTERISTICS
22
AC CHARACTERISTICS
22.1
Program memory
22.2
External Data Memory
23
PACKAGE OUTLINES
24
SOLDERING
24.1
Introduction
24.2
DIP
24.3
QFP
25
DEFINITIONS
26
LIFE SUPPORT APPLICATIONS
27
PURCHASE OF PHILIPS I
2
C COMPONENTS
1997 Mar 14
3
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
1
FEATURES
•
Full static 80C51 CPU
•
8-bit CPU, ROM, RAM, I/O in a 40-lead DIP or 44-lead
QFP package
•
16 kbytes ROM, expandable externally to 64 kbytes
•
256 bytes RAM, expandable externally to 64 kbytes
•
Four 8-bit ports, 32 I/O lines
•
Three 16-bit timer/event counters
•
External memory expandable up to 128 kbytes: RAM up
to 64 kbytes and ROM up to 64 kbytes
•
On-chip oscillator suitable for RC, LC, quartz crystal or
ceramic resonator
•
Fifteen source, fifteen vector interrupt structure with two
priority levels
•
Full duplex serial port (UART)
•
I
2
C-bus interface for serial transfer on two lines
•
Enhanced architecture with:
– non-page oriented instructions
– direct addressing
– four 8 byte RAM register banks
– stack depth limited only by available internal RAM
(maximum 256 bytes)
– multiply, divide, subtract and compare instructions
•
Reduced power consumption through Power-down and
Idle modes
•
Wake-up via external interrupts at Port 1
•
Single supply voltage of 1.8 to 6.0 V
•
Operating ambient temperature:
– 83CL781:
−
40 to +85
°
C
– 83CL782:
−
25 to +55
°
C.
•
Frequency range of DC to 12 MHz
•
Very low current consumption.
2
GENERAL DESCRIPTION
The term P83CL78x is used throughout this data sheet to
refer to both the P83CL781 and P83CL782; differences
between the devices are highlighted in the text.
The P83CL78x is manufactured in an advanced CMOS
technology. The P83CL78x has the same instruction set
as the 80C51, consisting of over 100 instructions:
49 one-byte, 46 two-byte, and 16 three-byte. The device
has low power consumption and a wide range of supply
voltage; there are two software-selectable modes of
reduced activity for further power reduction: Idle and
Power-down. For emulation purposes, the P85CL781
(piggy-back version) with 256 bytes of RAM is
recommended.
The P83CL782 is a faster version of the P83CL781 and
operates at a maximum frequency of 12 MHz at
V
DD
≥
3.1 V.
This data sheet details the specific properties of the
P83CL78x. For details of the 80C51 core and the I
2
C-bus
see
“Data Handbook IC20”.
3
APPLICATIONS
The P83CL78x is an 8-bit general purpose microcontroller
especially suited for cordless telephone applications.
The P83CL78x also functions as an arithmetic processor
having facilities for both binary and BCD arithmetic plus
bit-handling capabilities.
1997 Mar 14
4
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
4
ORDERING INFORMATION
Note
1. Refer to the Order Entry Form (OEF) for this device for the full type number, including options/program.
TYPE NUMBER
(1)
PACKAGE
NAME
DESCRIPTION
VERSION
DIP40
plastic dual in-line package; 40 leads (600 mil)
SOT129-1
QFP44
plastic quad flat package; 44 leads (lead length 2.35 mm);
body 14
×
14
×
2.2 mm
SOT205-1
QFP44
plastic quad flat package; 44 leads (lead length 1.3 mm);
body 10
×
10
×
1.75 mm
SOT307-2
P83CL781HDH
1997 Mar 14
5
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
5
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MLA601
3
3
1
2
0
3
3
RD
WR
PSEN
XTAL2
XTAL1
AD0 to 7
A8 to 15
EA
3
3
3
3
SDA
SCL
DD
V
RXD
TXD
P3
P2
P1
P0
T0
T1
INT0
INT1
0
1
alternative function of Port 0
alternative functions of Port 1
2
3
alternative function of Port 2
alternative function of Port 3
PARALLEL
I/O PORTS
AND
EXTERNAL
BUS
SERIAL
UART
PORT
16-BIT
TIMER/
EVENT
COUNTER
TWO
16-BIT
TIMER/
EVENT
COUNTERS
(T0, T1)
80C51
core
excluding
ROM/RAM
CPU
PROGRAM
MEMORY
DATA
MEMORY
8-bit internal bus
16 kbyte
ROM
256 byte
RAM
SS
V
ALE
I
2
C
INTERFACE
P83CL781
P83CL782
RST
1
T2EX
T2
1
1
1997 Mar 14
6
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
6
FUNCTIONAL DIAGRAM
handbook, full pagewidth
MBH885
PORT 0
SS
V
DD
V
PORT 1
PORT 3
LOW ORDER
ADDRESS
AND
DATA BUS
(AD0 to AD7)
PORT 2
HIGH ORDER
ADDRESS
BUS
(A8 to A15)
T2
INT2
T2EX INT3
INT4
INT5
INT6
SCL
SDA
RST
XTAL1
XTAL2
RXD/data
TXD/clock
T0
T1
RD
WR
INT1
INT0
P83CL781
P83CL782
PSEN
EA
ALE
INT8
INT9
INT7
Fig.2 Functional diagram.
1997 Mar 14
7
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
7
PINNING INFORMATION
7.1
Pinning
Fig.3 Pin configuration for DIP40 package.
MLA603
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
21
22
23
24
25
26
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
P2.7/A15
P2.6/A14
P2.5/A13
EA
PSEN
P1.5/INT7
RST
P1.6/INT8/SCL
P1.7/INT9/SDA
P3.4/T0
P3.5/T1
P3.0/RXD/data
P3.1/TXD/clock
P3.2/INT0
P3.3/INT1
ALE
P83CL781
P83CL782
XTAL2
XTAL1
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
VSS
P3.7/RD
P3.6/WR
VDD
P1.4/INT6
P1.3/INT5
P1.2/INT4
P1.1/INT3/T2EX
P1.0/INT2/T2
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
1997 Mar 14
8
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
handbook, full pagewidth
P83CL781
P83CL782
P1.5/INT7
P1.6/INT8/SCL
P1.7/INT9/SDA
RST
P3.0/RXD/data
n.c.
P3.1/TXD/clock
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
V
SS
SS
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
TEST/V
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
n.c.
EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
V
DD
n.c.
P1.0/INT2/T2
P1.1/INT3/T2EX
P1.2/INT4
P1.3/INT5
P1.4/INT6
MLA604
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
Fig.4 Pin configuration for QFP44 packages.
1997 Mar 14
9
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
7.2
Pin description
SYMBOL
PIN
DESCRIPTION
DIP40
QFP44
P1.0/INT2/T2
1
40
•
Port 1: 8-bit bidirectional I/O port (P1.0 to P1.7). Port pins that have logic 1s
written to them are pulled HIGH by internal pull-ups, and in this state can be
used as inputs (note that P1.6 and P1.7 are open-drain only). As inputs, Port 1
pins that are externally pulled LOW will source current (I
IL
) due to the internal
pull-ups. Port 1 output buffers can sink/source 4 LS TTL loads.
•
Alternative functions:
– INT2 to INT9 are external interrupt inputs
– T2 and T2EX are the Timer/event counter 2 inputs
– SCL and SDA are the I
2
C-bus clock and data lines.
P1.1/INT3/T2EX
2
41
P1.2/INT4
3
42
P1.3/INT5
4
43
P1.4/INT6
5
44
P1.5/INT7
6
1
P1.6/INT8/SCL
7
2
P1.7/INT9/SDA
8
3
RST
9
4
Reset: A HIGH level on this pin for two machine cycles while the oscillator is
running, resets the device.
n.c.
−
6
Not connected.
P3.0/RXD/data
10
5
•
Port 3: 8-bit bidirectional I/O port (P3.0 to P3.7).
Same characteristics as Port 1.
•
Alternative functions:
– RXD/data is the UART serial data input (asynchronous) or data I/O
(synchronous)
– TXD/clock is the UART serial data output (asynchronous) or clock output
(synchronous)
–
INT0 and INT1 are external interrupt lines
– T0 and T1 are external inputs for Timer 0 and Timer 1 respectively
– WR is the external memory write strobe and RD is the external memory read
strobe.
P3.1/TXD/clock
11
7
P3.2/INT0
12
8
P3.3/INT1
13
9
P3.4/T0
14
10
P3.5/T1
15
11
P3.6/WR
16
12
P3.7/RD
17
13
XTAL2
18
14
Crystal Output: Output of the inverting amplifier that forms the oscillator. Left
open-circuit when an external oscillator clock is used.
XTAL1
19
15
Crystal Input: Input to the inverting amplifier that forms the oscillator, also the
input for an externally generated clock source.
V
SS
20
16
Ground: Circuit ground potential.
TEST/V
SS
−
17
Test Input: Must be connected to V
SS
or left open.
P2.0/A8
21
18
•
Port 2: 8-bit bidirectional I/O port (P2.0 to P2.7).
Same characteristics as Port 1.
•
High-order addressing: A8 to A15 make up the high-order address byte
during accesses to external memory that use 16-bit addresses
(MOVX@DPTR). In this application the pins use the strong internal pull-ups
when emitting logic 1's. During accesses to external memory that use 8-bit
addresses (MOVX@Ri), the pins emit the contents of the P2 Special Function
Register.
P2.1/A9
22
19
P2.2/A10
23
20
P2.3/A11
24
21
P2.4/A12
25
22
P2.5/A13
26
23
P2.6/A14
27
24
P2.7/A15
28
25
1997 Mar 14
10
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
PSEN
29
26
Program Store Enable: Read strobe to external Program Memory. When
executing code out of external Program Memory, PSEN is activated twice each
machine cycle. However, during each access to external Data Memory two
PSEN activations are skipped.
ALE
30
27
Address Latch Enable: Latches the low byte of the address during accesses to
external memory. It is activated every six oscillator periods and may be used for
external timing or clocking purposes.
n.c.
−
28
Not connected.
EA
31
29
External Access: When EA is held HIGH, the CPU executes out of the internal
Program Memory (unless the Program Counter exceeds 3FFFH). When EA is
held LOW, the CPU executes out of external Program Memory regardless of the
value of the program counter.
P0.7/AD7
32
30
•
Port 0: 8-bit open-drain bidirectional I/O port (P0.7 to P0.0). As an open-drain
output port it can sink/source 8 LS TTL loads. Port 0 pins that have logic 1s
written to them float, and in this state will function as high-impedance inputs.
•
Low-order addressing: AD7 to AD0 provide the multiplexed low-order
address and data bus during accesses to external memory. In this application
the pins use the strong internal pull-ups when emitting logic 1s.
P0.6/AD6
33
31
P0.5/AD5
34
32
P0.4/AD4
35
33
P0.3/AD3
36
34
P0.2/AD2
37
35
P0.1/AD1
38
36
P0.0/AD0
39
37
V
DD
40
38
Power supply.
n.c.
−
39
Not connected.
SYMBOL
PIN
DESCRIPTION
DIP40
QFP44
1997 Mar 14
11
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
8
FUNCTIONAL DESCRIPTION OVERVIEW
This chapter gives a brief overview of the device. The
detailed functional description is in the following chapters:
Chapter 9 “Memory organization”
Chapter 10 “I/O facilities”
Chapter 11 “Timer/event counters”
Chapter 12 “Reduced power modes”
Chapter 13 “I
2
C-bus serial I/O”
Chapter 14 “Standard serial interface SIO0: UART”
Chapter 15 “Interrupt system”
Chapter 16 “Oscillator circuitry”
Chapter 17 “Reset”.
8.1
General
The P83CL78x is a stand-alone high-performance CMOS
microcontroller designed for use in real-time applications
such as instrumentation, industrial control, intelligent
computer peripherals and consumer products. The device
provides hardware features, architectural enhancements
and new instructions to function as a controller for
applications requiring up to 64 kbytes of Program Memory
and/or up to 64 kbytes of data storage.
The P83CL78x contains a non-volatile 16 kbyte read-only
Program Memory; a static 256 byte read/write Data
Memory; 32 I/O lines; three 16-bit timer/event counters; a
fifteen-source, two priority-level, nested interrupt structure
and on-chip oscillator and timing circuit.
The device has two software-selectable modes of reduced
activity for power reduction:
•
Idle mode; freezes the CPU while allowing the timers,
serial I/O and interrupt system to continue functioning.
•
Power-down mode; saves the RAM contents but
freezes the oscillator causing all other chip functions to
be inoperative.
In addition, two serial interfaces are provided on-chip:
•
a standard UART serial interface, and
•
a standard I
2
C-bus serial interface. The I
2
C-bus serial
interface has byte-oriented master and slave functions
allowing communication with the whole family of I
2
C-bus
compatible devices.
8.2
CPU timing
A machine cycle consists of a sequence of 6 states. Each
state lasts for two oscillator periods, thus a machine cycle
takes 12 oscillator periods or 1
µ
s if the oscillator
frequency (f
osc
) is 12 MHz.
1997 Mar 14
12
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
9
MEMORY ORGANIZATION
The P83CL78x has a 16 kbyte Program Memory (ROM)
plus 256 bytes of Data Memory (RAM) on-chip. The device
has separate address spaces for Program and Data
Memory (see Fig.6). Using Ports P0 and P2, the
P83CL78x can address up to 128 kbytes of external
memory. The CPU generates both read (RD) and write
(WR) signals for external Data Memory accesses, and the
read strobe (PSEN) for external Program Memory.
9.1
Program memory
The P83CL78x contains 16 kbytes of internal ROM. After
reset the CPU begins execution at location 0000H.
The lower 16 kbytes of Program Memory can be
implemented in either on-chip ROM or external memory.
If the EA pin is strapped to V
DD
, then Program Memory
fetches from addresses 0000H through to 3FFFH are
directed to the internal ROM. Fetches from addresses
4000H through to FFFFH are directed to external ROM.
Program Counter values greater than 3FFFH are
automatically addressed to external memory regardless of
the state of the EA pin.
9.2
Data memory
The P83CL78x contains 256 bytes of internal RAM and
34 Special Function Registers (SFRs). The memory map
(Fig.6 ) shows the internal Data Memory space divided into
the lower 128 bytes, the upper 128 bytes and the SFR
space. Internal RAM locations 0 to 127 are directly and
indirectly addressable. Internal RAM locations 128 to 255
are only indirectly addressable. The Special Function
Register locations 128 to 255 bytes are only directly
addressable.
9.3
Special Function Registers
The upper 128 bytes are the address locations of the
Special Function Registers. Figures 7 and 8 show the
Special Function Registers space. The SFRs include the
port latches, timers, peripheral control, serial I/O registers,
and so on. These registers can only be accessed by direct
addressing. There are 128 addressable locations in the
SFR address space (SFRs with addresses divisible by
eight).
9.4
Addressing
The P83CL78x has five methods for addressing source
operands:
•
Register
•
Direct
•
Register-indirect
•
Immediate
•
Base-register plus index-register-indirect.
The first three methods can be used for addressing
destination operands. Most instructions have a
‘destination/source’ field that specifies the data type,
addressing methods and operands involved.
For operations other than MOVs, the destination operand
is also a source operand.
Fig.5 The lower 128 bytes of internal RAM.
alfpage
MLA560 - 1
R7
R0
07H
0
R7
R0
0FH
08H
R7
R0
17H
10H
R7
R0
1FH
18H
2FH
7FH
20H
30H
bit-addressable space
(bit addresses 0 to 7F)
4 banks of 8 registers
(R0 to R7)
1997 Mar 14
13
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
Access to memory addressing is as follows:
•
Registers in one of the four register banks through
register, direct or register-indirect
•
256 bytes of internal data RAM through direct or
register-indirect
•
Special Function Registers through direct
•
External Data Memory through register-indirect
•
Program Memory look-up tables through base-register
plus index-register-indirect.
The P83CL78x is classified as an 8-bit device since the
internal ROM, RAM, Special Function Registers,
Arithmetic Logic Unit and external data bus are all 8-bits
wide. It performs operations on bit, nibble, byte and
double-byte data types.
Facilities are available for byte transfer, logic and integer
arithmetic operations. Data transfer, logic and conditional
branch operations can be performed directly on Boolean
variables to provide excellent bit handling.
Fig.6 Memory map.
handbook, full pagewidth
MLA605
INTERNAL
DATA RAM
255
127
0
EXTERNAL
(EA = 0)
INTERNAL
(EA = 1)
INTERNAL DATA MEMORY
EXTERNAL
DATA MEMORY
PROGRAM MEMORY
EXTERNAL
64 kbytes
64 kbytes
16 kbytes
16 kbytes
OVERLAPPED SPACE
0
16 kbytes
SPECIAL
FUNCTION
REGISTERS
(INDIRECT
ONLY)
1997 Mar 14
14
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
Fig.7 Special Function Register memory map