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L6206
September 2003
s
OPERATING SUPPLY VOLTAGE FROM 8 TO 52V
s
5.6A OUTPUT PEAK CURRENT (2.8A DC)
s
R
DS(ON)
0.3
Ω
TYP. VALUE @ T
j
= 25 °C
s
OPERATING FREQUENCY UP TO 100KHz
s
PROGRAMMABLE HIGH SIDE OVERCURRENT
DETECTION AND PROTECTION
s
DIAGNOSTIC OUTPUT
s
PARALLELED OPERATION
s
CROSS CONDUCTION PROTECTION
s
THERMAL SHUTDOWN
s
UNDER VOLTAGE LOCKOUT
s
INTEGRATED FAST FREE WHEELING DIODES
TYPICAL APPLICATIONS
s
BIPOLAR STEPPER MOTOR
s
DUAL OR QUAD DC MOTOR
DESCRIPTION
The L6206 is a DMOS Dual Full Bridge designed for
motor control applications, realized in MultiPower-
BCD technology, which combines isolated DMOS
Power Transistors with CMOS and bipolar circuits on
the same chip. Available in PowerDIP24 (20+2+2),
PowerSO36 and SO24 (20+2+2) packages, the
L6206 features thermal shutdown and a non-dissipa-
tive overcurrent detection on the high side Power
MOSFETs plus a diagnostic output that can be easily
used to implement the overcurrent protection.
BLOCK DIAGRAM
D99IN1088A
GATE
LOGIC
OVER
CURRENT
DETECTION
OVER
CURRENT
DETECTION
GATE
LOGIC
VCP
VBOOT
EN
A
IN1
A
IN2
A
EN
B
IN1
B
IN2
B
V
BOOT
5V
10V
VS
A
V
S
B
OUT1
A
OUT2
A
OUT1
B
OUT2
B
SENSE
A
CHARGE
PUMP
VOLTAGE
REGULATOR
THERMAL
PROTECTION
V
BOOT
V
BOOT
10V
10V
BRIDGE A
BRIDGE B
SENSE
B
PROGCL
B
OCD
B
OCD
A
PROGCL
A
OCD
A
OCD
B
ORDERING NUMBERS:
L6206N (PowerDIP24)
L6206PD (PowerSO36)
L6206D (SO24)
PowerDIP24
(20+2+2)
PowerSO36
SO24
(20+2+2)
DMOS DUAL FULL BRIDGE DRIVER
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L6206
2/23
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Test conditions
Value
Unit
V
S
Supply Voltage
V
SA
= V
SB
= V
S
60
V
V
OD
Differential Voltage between
VS
A
, OUT1
A
, OUT2
A
, SENSE
A
and
VS
B
, OUT1
B
, OUT2
B
, SENSE
B
V
SA
= V
SB
= V
S
= 60V;
V
SENSEA
= V
SENSEB
= GND
60
V
OCD
A
,OCD
B
OCD pins Voltage Range
-0.3 to +10
V
PROGCL
A
,
PROGCL
B
PROGCL pins Voltage Range
-0.3 to +7
V
V
BOOT
Bootstrap Peak Voltage
V
SA
= V
SB
= V
S
V
S
+ 10
V
V
IN
,V
EN
Input and Enable Voltage Range
-0.3 to +7
V
V
SENSEA,
V
SENSEB
Voltage Range at pins SENSE
A
and SENSE
B
-1 to +4
V
I
S(peak)
Pulsed Supply Current (for each
V
S
pin), internally limited by the
overcurrent protection
V
SA
= V
SB
= V
S
;
t
PULSE
< 1ms
7.1
A
I
S
RMS Supply Current (for each
V
S
pin)
V
SA
= V
SB
= V
S
2.8
A
T
stg
, T
OP
Storage and Operating
Temperature Range
-40 to 150
°
C
Symbol
Parameter
Test Conditions
MIN
MAX
Unit
V
S
Supply Voltage
V
SA
= V
SB
= V
S
8
52
V
V
OD
Differential Voltage Between
VS
A
, OUT1
A
, OUT2
A
, SENSE
A
and
VS
B
, OUT1
B
, OUT2
B
, SENSE
B
V
SA
= V
SB
= V
S
;
V
SENSEA
= V
SENSEB
52
V
V
SENSEA,
V
SENSEB
Voltage Range at pins SENSE
A
and SENSE
B
(pulsed t
W
< t
rr
)
(DC)
-6
-1
6
1
V
V
I
OUT
RMS Output Current
2.8
A
T
j
Operating Junction Temperature
-25
+125
°C
f
sw
Switching Frequency
100
KHz
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L6206
THERMAL DATA
PIN CONNECTIONS (Top View)
(5) The slug is internally connected to pins 1,18,19 and 36 (GND pins).
Symbol
Description
PowerDIP24
SO24
PowerSO36
Unit
R
th-j-pins
MaximumThermal Resistance Junction-Pins
18
14
-
°
C/W
R
th-j-case
Maximum Thermal Resistance Junction-Case
-
-
1
°
C/W
R
th-j-amb1
MaximumThermal Resistance Junction-Ambient
1
(1)
Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm
2
(with a thickness of 35 µm).
43
51
-
°
C/W
R
th-j-amb1
Maximum Thermal Resistance Junction-Ambient
2
(2)
Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm
2
(with a thickness of 35 µm).
-
-
35
°
C/W
R
th-j-amb1
MaximumThermal Resistance Junction-Ambient
3
(3)
Mounted on a multi-layer FR4 PCB with a dissipating copper surface on the top side of 6 cm
2
(with a thickness of 35 µm), 16 via holes
and a ground layer.
-
-
15
°
C/W
R
th-j-amb2
Maximum Thermal Resistance Junction-Ambient
4
(4)
Mounted on a multi-layer FR4 PCB without any heat sinking surface on the board.
58
77
62
°
C/W
PowerDIP24/SO24
PowerSO36
(5)
GND
GND
OUT1
B
OCD
B
SENSE
B
IN2
B
IN1
B
1
3
2
4
5
6
7
8
9
PROGCL
B
VBOOT
EN
B
OUT2
B
VS
B
GND
GND
19
18
17
16
15
13
14
D99IN1089A
10
11
12
24
23
22
21
20
IN1
A
IN2
A
SENSE
A
OCD
A
OUT1
A
VS
A
OUT2
A
VCP
EN
A
PROGCL
A
GND
N.C.
N.C.
VS
A
OCD
A
OUT1
A
N.C.
N.C.
N.C.
N.C.
N.C.
OUT1
B
OCD
B
N.C.
VS
B
N.C.
N.C.
GND
18
16
17
15
6
5
4
3
2
21
22
31
32
33
35
34
36
20
1
19
GND
GND
D99IN1090A
IN1
A
SENSE
A
IN2
A
SENSE
B
IN2
B
IN1
B
9
8
7
28
29
30
PROGCL
A
PROGCL
B
10
27
OUT2
A
EN
A
VCP
EN
B
OUT2
B
VBOOT
14
12
11
23
25
26
N.C.
N.C.
13
24
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L6206
4/23
PIN DESCRIPTION
PACKAGE
Name
Type
Function
SO24/
PowerDIP24
PowerSO36
PIN #
PIN #
1
10
IN1
A
Logic input
Bridge A Logic Input 1.
2
11
IN2
A
Logic input
Bridge A Logic Input 2.
3
12
SENSE
A
Power Supply
Bridge A Source Pin. This pin must be connected to Power
Ground directly or through a sensing power resistor.
4
13
OCD
A
Open Drain
Output
Bridge A Overcurrent Detection and thermal protection pin.
An internal open drain transistor pulls to GND when
overcurrent on bridge A is detected or in case of thermal
protection.
5
15
OUT1
A
Power Output
Bridge A Output 1.
6, 7,
18, 19
1, 18,
19, 36
GND
GND
Signal Ground terminals. In Power DIP and SO packages,
these pins are also used for heat dissipation toward the
PCB.
8
22
OUT1
B
Power Output
Bridge B Output 1.
9
24
OCD
B
Open Drain
Output
Bridge B Overcurrent Detection and thermal protection pin.
An internal open drain transistor pulls to GND when
overcurrent on bridge B is detected or in case of thermal
protection.
10
25
SENSE
B
Power Supply
Bridge B Source Pin. This pin must be connected to Power
Ground directly or through a sensing power resistor.
11
26
IN1
B
Logic Input
Bridge B Input 1
12
27
IN2
B
Logic Input
Bridge B Input 2
13
28
PROGCL
B
R Pin
Bridge B Overcurrent Level Programming. A resistor
connected between this pin and Ground sets the
programmable current limiting value for the bridge B. By
connecting this pin to Ground the maximum current is set.
This pin cannot be left non-connected.
14
29
EN
B
Logic Input
Bridge B Enable. LOW logic level switches OFF all Power
MOSFETs of Bridge B.
If not used, it has to be connected to +5V.
15
30
VBOOT
Supply
Voltage
Bootstrap Voltage needed for driving the upper Power
MOSFETs of both Bridge A and Bridge B.
16
32
OUT2
B
Power Output
Bridge B Output 2.
17
33
VS
B
Power Supply
Bridge B Power Supply Voltage. It must be connected to
the supply voltage together with pin VS
A
.
20
4
VS
A
Power Supply
Bridge A Power Supply Voltage. It must be connected to
the supply voltage together with pin VS
B
.
21
5
OUT2
A
Power Output
Bridge A Output 2.
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L6206
PACKAGE
Name
Type
Function
SO24/
PowerDIP24
PowerSO36
PIN #
PIN #
22
7
VCP
Output
Charge Pump Oscillator Output.
23
8
EN
A
Logic Input
Bridge A Enable. LOW logic level switches OFF all Power
MOSFETs of Bridge A.
If not used, it has to be connected to +5V.
24
9
PROGCL
A
R Pin
Bridge A Overcurrent Level Programming. A resistor
connected between this pin and Ground sets the
programmable current limiting value for the bridge A. By
connecting this pin to Ground the maximum current is set.
This pin cannot be left non-connected.
ELECTRICAL CHARACTERISTICS
(T
amb
= 25 °C, V
s
= 48V, unless otherwise specified)
Symbol
Parameter Test
Conditions
Min
Typ
Max
Unit
V
Sth(ON)
Turn-on Threshold
6.6
7
7.4
V
V
Sth(OFF)
Turn-off Threshold
5.6
6
6.4
V
I
S
Quiescent Supply Current
All Bridges OFF;
T
j
= -25°C to 125°C
(6)
5
10
mA
T
j(OFF)
Thermal Shutdown Temperature
165
°
C
Output DMOS Transistors
R
DS(ON)
High-Side Switch ON Resistance T
j
= 25
°
C
0.34
0.4
Ω
T
j
=125
°
C
(6)
0.53
0.59
Ω
Low-Side Switch ON Resistance
T
j
= 25
°
C
0.28
0.34
Ω
T
j
=125
°
C
(6)
0.47
0.53
Ω
I
DSS
Leakage Current
EN = Low; OUT = V
S
2
mA
EN = Low; OUT = GND
-0.15
mA
Source Drain Diodes
V
SD
Forward ON Voltage
I
SD
= 2.8A, EN = LOW
1.15
1.3
V
t
rr
Reverse Recovery Time
I
f
= 2.8A
300
ns
t
fr
Forward Recovery Time
200
ns
Logic Input
V
IL
Low level logic input voltage
-0.3
0.8
V
V
IH
High level logic input voltage
2
7
V
I
IL
Low Level Logic Input Current
GND Logic Input Voltage
-10
µA
PIN DESCRIPTION (continued)
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L6206
6/23
(6)
Tested at 25°C in a restricted range and guaranteed by characterization.
(7)
See Fig. 1.
(8)
See Fig. 2.
I
IH
High Level Logic Input Current
7V Logic Input Voltage
10
µA
V
th(ON)
Turn-on Input Threshold
1.8
2.0
V
V
th(OFF)
Turn-off Input Threshold
0.8
1.3
V
V
th(HYS)
Input Threshold Hysteresis
0.25
0.5
V
Switching Characteristics
t
D(on)EN
Enable to out turn ON delay time
(7)
I
LOAD
=2.8A, Resistive Load
100
250
400
ns
t
D(on)IN
Input to out turn ON delay time
I
LOAD
=2.8A, Resistive Load
(dead time included)
1.6
µs
t
RISE
Output rise time
(7)
I
LOAD
=2.8A, Resistive Load
40
250
ns
t
D(off)EN
Enable to out turn OFF delay time
(7)
I
LOAD
=2.8A, Resistive Load
300
550
800
ns
t
D(off)IN
Input to out turn OFF delay time
I
LOAD
=2.8A, Resistive Load
600
ns
t
FALL
Output Fall Time
(7)
I
LOAD
=2.8A, Resistive Load
40
250
ns
t
dt
Dead Time Protection
0.5
1
µs
f
CP
Charge pump frequency
-25°C<T
j
<125°C
0.6
1
MHz
Over Current Detection
I
s over
Input Supply Over Current
DetectionThreshold
-25°C<T
j
<125
°
C; RCL= 39 k
Ω
-25°C<T
j
<125
°
C; RCL= 5 k
Ω
-25°C<T
j
<125
°
C; RCL= GND
-10%
-10%
-30%
0.57
4.42
5.6
+10%
+10%
+30%
A
A
A
R
OPDR
Open Drain ON Resistance
I = 4mA
40
60
Ω
t
OCD(ON)
OCD Turn-on Delay Time (8)
I = 4mA; C
EN
< 100pF
200
ns
t
OCD(OFF)
OCD Turn-off Delay Time (8)
I = 4mA; C
EN
< 100pF
100
ns
ELECTRICAL CHARACTERISTICS (continued)
(T
amb
= 25 °C, V
s
= 48V, unless otherwise specified)
Symbol
Parameter Test
Conditions
Min
Typ
Max
Unit
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7/23
L6206
Figure 1. Switching Characteristic Definition
Figure 2. Overcurrent Detection Timing Definition
V
th(ON)
V
th(OFF)
90%
10%
EN
I
OUT
t
t
t
FALL
t
D(OFF)EN
t
RISE
t
D(ON)EN
D01IN1316
OCD
Threshold
90%
10%
I
OUT
V
OCD
t
t
t
OCD(OFF)
t
OCD(ON)
D01IN1222
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L6206
8/23
CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP
The L6206 integrates two independent Power MOS
Full Bridges. Each Power MOS has an Rd-
son=0.3ohm (typical value @ 25°C), with intrinsic
fast freewheeling diode. Cross conduction protection
is achieved using a dead time (td = 1
µ
s typical) be-
tween the switch off and switch on of two Power MOS
in one leg of a bridge.
Using N Channel Power MOS for the upper transis-
tors in the bridge requires a gate drive voltage above
the power supply voltage. The Bootstrapped (Vboot)
supply is obtained through an internal Oscillator and
few external components to realize a charge pump
circuit as shown in Figure 3. The oscillator output
(VCP) is a square wave at 600kHz (typical) with 10V
amplitude. Recommended values/part numbers for
the charge pump circuit are shown in Table1.
Table 1. Charge Pump External Components
Values
Figure 3. Charge Pump Circuit
LOGIC INPUTS
Pins IN1
A
, IN2
A
, IN1
B
, IN2
B
, EN
A
and EN
B
are TTL/
CMOS and uC compatible logic inputs. The internal
structure is shown in Fig. 4. Typical value for turn-on
and turn-off thresholds are respectively Vthon=1.8V
and Vthoff = 1.3V.
Pins EN
A
and EN
B
are commonly used to implement
Overcurrent and Thermal protection by connecting
them respectively to the outputs OCD
A
and OCD
B
,
which are open-drain outputs. If that type of connec-
tion is chosen, some care needs to be taken in driving
these pins. Two configurations are shown in Fig. 5
and Fig. 6. If driven by an open drain (collector) struc-
ture, a pull-up resistor R
EN
and a capacitor C
EN
are
connected as shown in Fig. 5. If the driver is a stan-
dard Push-Pull structure the resistor R
EN
and the ca-
pacitor C
EN
are connected as shown in Fig. 6. The
resistor R
EN
should be chosen in the range from
2.2k
Ω
to 180K
Ω
. Recommended values for R
EN
and
C
EN
are respectively 100K
Ω
and 5.6nF. More infor-
mation on selecting the values is found in the Over-
current Protection section.
Figure 4. Logic Inputs Internal Structure
Figure 5. EN
A
and EN
B
Pins Open Collector
Driving
Figure 6. EN
A
and EN
B
Pins Push-Pull Driving
TRUTH TABLE
X
= Don't care
High Z = High Impedance Output
C
BOOT
220nF
C
P
<