background image
©2002 Fairchild Semiconductor Corporation
FQB8P
10 /
F
Q
I8P
1
0
QFET
TM
Rev. B, August 2002
FQB8P10 / FQI8P10
100V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
Features
• -8.0A, -100V, R
DS(on)
= 0.53
@V
GS
= -10 V
• Low gate charge ( typical 12 nC)
• Low Crss ( typical 30 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• 175
°
C maximum junction temperature rating
Absolute Maximum Ratings
T
C
= 25°C unless otherwise noted
Thermal Characteristics
Symbol
Parameter
FQB8P10 / FQI8P10
Units
V
DSS
Drain-Source Voltage
-100
V
I
D
Drain Current
- Continuous (T
C
= 25°C)
-8.0
A
- Continuous (T
C
= 100°C)
-5.7
A
I
DM
Drain Current
- Pulsed
(Note 1)
-32
A
V
GSS
Gate-Source Voltage
±
30
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
150
mJ
I
AR
Avalanche Current
(Note 1)
-8.0
A
E
AR
Repetitive Avalanche Energy
(Note 1)
6.5
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
-6.0
V/ns
P
D
Power Dissipation (T
A
= 25°C) *
3.75
W
Power Dissipation (T
C
= 25°C)
65
W
- Derate above 25°C
0.43
W/°C
T
J
, T
STG
Operating and Storage Temperature Range
-55 to +175
°C
T
L
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
300
°C
Symbol
Parameter
Typ
Max
Units
R
θ
JC
Thermal Resistance, Junction-to-Case
--
2.31
°C
/
W
R
θ
JA
Thermal Resistance, Junction-to-Ambient *
--
40
°C
/
W
R
θ
JA
Thermal Resistance, Junction-to-Ambient
--
62.5
°C
/
W
* When mounted on the minimum pad size recommended (PCB Mount)
G
S
D
D
2
-PAK
FQB Series
I
2
-PAK
FQI Series
G
S
D
S
D
G
background image
Rev. B, August 2002
FQB8P
10 /
F
Q
I8P
1
0
©2002 Fairchild Semiconductor Corporation
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
Electrical Characteristics
T
C
= 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 3.5mH, I
AS
= -8.0A, V
DD
= -25V, R
G
= 25
Ω,
Starting T
J
= 25°C
3. I
SD
-8.0A, di/dt
300A/
µ
s, V
DD
BV
DSS,
Starting T
J
= 25°C
4. Pulse Test : Pulse width
300
µ
s, Duty cycle
2%
5. Essentially independent of operating temperature
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= -250
µ
A
-100
--
--
V
BV
DSS
/
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= -250
µ
A, Referenced to 25°C
--
-0.1
--
V/°C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= -100 V, V
GS
= 0 V
--
--
-1
µ
A
V
DS
= -80 V, T
C
= 150°C
--
--
-10
µ
A
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= -30 V, V
DS
= 0 V
--
--
-100
nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= 30 V, V
DS
= 0 V
--
--
100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250
µ
A
-2.0
--
-4.0
V
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= -10 V, I
D
= -4.0 A
--
0.41
0.53
g
FS
Forward Transconductance
V
DS
= -40 V, I
D
= -4.0 A
--
4.3
--
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= -25 V, V
GS
= 0 V,
f = 1.0 MHz
--
360
470
pF
C
oss
Output Capacitance
--
120
155
pF
C
rss
Reverse Transfer Capacitance
--
30
40
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= -50 V, I
D
= -8.0 A,
R
G
= 25
--
11
30
ns
t
r
Turn-On Rise Time
--
110
230
ns
t
d(off)
Turn-Off Delay Time
--
20
50
ns
t
f
Turn-Off Fall Time
--
35
80
ns
Q
g
Total Gate Charge
V
DS
= -80 V, I
D
= -8.0 A,
V
GS
= -10 V
--
12
15
nC
Q
gs
Gate-Source Charge
--
3.0
--
nC
Q
gd
Gate-Drain Charge
--
6.4
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
--
--
-8.0
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
-32
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -8.0 A
--
--
-4.0
V
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
S
= -8.0 A,
dI
F
/ dt = 100 A/
µ
s
--
98
--
ns
Q
rr
Reverse Recovery Charge
--
0.35
--
µ
C
background image
©2002 Fairchild Semiconductor Corporation
FQB8P
10 /
F
Q
I8P
1
0
Rev. B, August 2002
0.0
0.5
1.0
1.5
2.0
2.5
3.0
10
-1
10
0
10
1
175
Notes :
1. V
GS
= 0V
2. 250
μ
s Pulse Test
25
-I
DR
, R
ev
ers
e
D
ra
in
C
urre
nt
[
A
]
-V
SD
, Source-Drain Voltage [V]
0
5
10
15
20
25
0.0
0.3
0.6
0.9
1.2
1.5
Note : T
J
= 25
V
GS
= - 20V
V
GS
= - 10V
R
D
S
(on)
[
],
D
rai
n-
S
ou
rce
O
n-
R
esi
st
ance
-I
D
, Drain Current [A]
2
4
6
8
10
10
-1
10
0
10
1
175
25
-55
Notes :
1. V
DS
= -40V
2. 250
μ
s Pulse Test
-I
D
, D
rai
n C
ur
rent
[
A
]
-V
GS
, Gate-Source Voltage [V]
10
-1
10
0
10
1
10
-2
10
-1
10
0
10
1
V
GS
Top : -15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-5.5 V
-5.0 V
Bottom : -4.5 V
Notes :
1. 250
μ
s Pulse Test
2. T
C
= 25
-I
D
, D
rai
n C
ur
rent
[A
]
-V
DS
, Drain-Source Voltage [V]
0
2
4
6
8
10
12
14
0
2
4
6
8
10
12
V
DS
= -50V
V
DS
= -20V
V
DS
= -80V
Note : I
D
= -8.0 A
-V
GS
, G
at
e-
S
our
ce
V
ol
tag
e [
V
]
Q
G
, Total Gate Charge [nC]
10
-1
10
0
10
1
0
100
200
300
400
500
600
700
800
900
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
C
apac
ita
nc
e [
pF]
-V
DS
, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer Characteristics
Figure 1. On-Region Characteristics
background image
©2002 Fairchild Semiconductor Corporation
FQB8P
10 /
F
Q
I8P
1
0
Rev. B, August 2002
1 0
- 5
1 0
- 4
1 0
- 3
1 0
- 2
1 0
- 1
1 0
0
1 0
1
1 0
- 2
1 0
- 1
1 0
0
N o te s :
1 . Z
θ
J C
(t) = 2 .3 1
/W M a x .
2 . D u ty F a c to r, D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
θ
J C
(t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
θ
JC
(t
),
T
h
e
rm
a
l R
e
s
p
o
n
s
e
t
1
, S q u a re W a v e P u ls e D u ra tio n [s e c ]
25
50
75
100
125
150
175
0
2
4
6
8
10
-I
D
, D
rai
n C
ur
re
nt
[A
]
T
C
, Case Temperature [
]
10
0
10
1
10
2
10
-1
10
0
10
1
10
2
DC
10 ms
1 ms
100
µ
s
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 175
o
C
3. Single Pulse
-I
D
, D
ra
in
C
urre
nt
[A
]
-V
DS
, Drain-Source Voltage [V]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. V
GS
= -10 V
2. I
D
= -4.0 A
R
DS
(O
N)
, (
N
or
m
al
iz
ed)
D
rai
n-
S
our
ce
O
n-
R
es
is
ta
nc
e
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
Notes :
1. V
GS
= 0 V
2. I
D
= -250
μ
A
-B
V
DSS
, (
N
or
m
al
iz
ed)
D
rai
n-
Sour
ce
B
reak
do
w
n
Vo
lta
ge
T
J
, Junction Temperature [
o
C]
Typical Characteristics
(Continued)
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Curve
t
1
P
DM
t
2
background image
©2002 Fairchild Semiconductor Corporation
FQB8P
10 /
F
Q
I8P
1
0
Rev. B, August 2002
Charge
V
GS
-10V
Q
g
Q
gs
Q
gd
-3mA
V
GS
DUT
V
DS
300nF
50K
Ω
200nF
12V
Same Type
as DUT
Charge
V
GS
-10V
Q
g
Q
gs
Q
gd
-3mA
V
GS
DUT
V
DS
300nF
50K
Ω
200nF
12V
Same Type
as DUT
V
DS
V
GS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
-10V
V
DS
R
L
DUT
R
G
V
GS
V
DS
V
GS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
-10V
V
DS
R
L
DUT
R
G
V
GS
E
AS
=
L I
AS
2
----
2
1
--------------------
BV
DSS
- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
-10V
DUT
R
G
L
I
D
t
p
E
AS
=
L I
AS
2
----
2
1
E
AS