REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
ADP3338
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001
High-Accuracy Ultralow I
Q
, 1 A, anyCAP
®
Low Dropout Regulator
FEATURES
High Accuracy Over Line and Load: 0.8% @ 25 C,
1.4% Over Temperature
Ultralow Dropout Voltage: 190 mV (Typ) @ 1 A
Requires Only C
O
= 1 F for Stability
anyCAP = Stable with Any Type of Capacitor
(Including MLCC)
Current and Thermal Limiting
Low Noise
2.7 V to 8 V Supply Range
–40 C to +85 C Ambient Temperature Range
SOT-223 Package
APPLICATIONS
Notebook, Palmtop Computers
SCSI Terminators
Battery-Powered Systems
Bar Code Scanners
Camcorders, Cameras
Home Entertainment Systems
Networking Systems
DSP/ASIC Supply
GENERAL DESCRIPTION
The ADP3338 is a member of the ADP33xx family of precision
low dropout anyCAP voltage regulators. The ADP3338 oper-
ates with an input voltage range of 2.7 V to 8 V and delivers a
load current up to 1 A. The ADP3338 stands out from the
conventional LDOs with a novel architecture and an enhanced
process that enables it to offer performance advantages and
higher output current than its competition. Its patented design
requires only a 1
µF output capacitor for stability. This device
is insensitive to output capacitor Equivalent Series Resistance
(ESR), and is stable with any good quality capacitor, including
ceramic (MLCC) types for space-restricted applications. The
ADP3338 achieves exceptional accuracy of
±0.8% at room
temperature and
±1.4% over temperature, line and load varia-
tions. The dropout voltage of the ADP3338 is only 190 mV
(typical) at 1 A. This device also includes a safety current limit
and thermal overload protection. The ADP3338 has ultralow
quiescent current 110
µA (typical) in light load situations.
anyCAP is a registered trademark of Analog Devices Inc.
V
IN
OUT
ADP3338
1 F
1 F
V
OUT
GND
IN
Figure 1. Typical Application Circuit
FUNCTIONAL BLOCK DIAGRAM
THERMAL
PROTECTION
CC
IN
ADP3338
OUT
R1
R2
GND
Q1
BANDGAP
REF
DRIVER
g
m
REV. 0
–2–
ADP3338–SPECIFICATIONS
1, 2, 3
(V
IN
= 6.0 V, C
IN
= C
OUT
= 1 F, T
J
= –40 C to +125 C, unless otherwise
noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
OUTPUT
Voltage Accuracy
V
OUT
V
IN
= V
OUTNOM
+ 0.4 V to 8 V
–0.8
+0.8
%
I
L
= 0.1 mA to 1 A
T
J
= 25
°C
V
IN
= V
OUTNOM
+ 0.4 V to 8 V
–1.4
+1.4
%
I
L
= 0.1 mA to 1 A
T
J
= –40
°C to +125°C
V
IN
= V
OUTNOM
+ 0.4 V to 8 V
–1.6
+1.6
%
I
L
= 50 mA to 1 A
T
J
= 150
°C
Line Regulation
V
IN
= V
OUTNOM
+ 0.4 V to 12 V
0.04
mV/V
T
J
= 25
°C
Load Regulation
I
L
= 0.1 mA to 1 A
0.006
mV/mA
T
J
= 25
°C
Dropout Voltage
V
DROP
V
OUT
= 98% of V
OUTNOM
I
L
= 1 A
190
400
mV
I
L
= 500 mA
125
200
mV
I
L
= 100 mA
70
150
mV
Peak Load Current
I
LDPK
V
IN
= V
OUTNOM
+ 1 V
1.6
A
Output Noise
V
NOISE
f = 10 Hz–100 kHz, C
L
= 10
µF
95
µV rms
I
L
= 1 A
GROUND CURRENT
In Regulation
I
GND
I
L
= 1 A
9
30
mA
I
L
= 500 mA
4.5
15
mA
I
L
= 100 mA
0.9
3
mA
I
L
= 0.1 mA
110
190
µA
In Dropout
I
GND
V
IN
= V
OUTNOM
– 100 mV
190
600
µA
I
L
= 0.1 mA
NOTES
1
All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
2
Application stable with no load.
3
V
IN
= 2.7 V for models with V
OUTNOM
≤ 2.2 V.
Specifications subject to change without notice.
REV. 0
ADP3338
–3–
ABSOLUTE MAXIMUM RATINGS
*
Input Supply Voltage . . . . . . . . . . . . . . . . . . –0.3 V to +8.5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . . –40
°C to +85°C
Operating Junction Temperature Range . . . –40
°C to +150°C
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62.3
°C/W
θ
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.8
°C/W
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . 300
°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged. Unless otherwise specified, all voltages are referenced
to GND.
PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
GND
Ground Pin.
2
OUT
Output of the Regulator. Bypass to
ground with a 1
µF or larger capacitor.
3
IN
Regulator Input. Bypass to ground with
a 1
µF or larger capacitor.
ORDERING GUIDE
Output
Package
Package
Model
Voltage
*
Option
Description
ADP3338AKC-1.8
1.8 V
KC (SOT-223)
Plastic Surface Mount
ADP3338AKC-2.5
2.5 V
KC (SOT-223)
Plastic Surface Mount
ADP3338AKC-2.85
2.85 V
KC (SOT-223)
Plastic Surface Mount
ADP3338AKC-3.3
3.3 V
KC (SOT-223)
Plastic Surface Mount
ADP3338AKC-5
5 V
KC (SOT-223)
Plastic Surface Mount
*Contact the factory for other voltage options.
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
3
2
1
IN
OUT
ADP3338
OUT
GND
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3338 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
ADP3338
–4–
–Typical Performance Characteristics
(T
A
= 25 C unless otherwise noted.)
I
L
= 0A
INPUT VOLTAGE – V
OUTPUT VOLTAGE – V
2.515
2.510
2.490
2.5
4.5
6.5
8.5
10.5
2.505
2.500
2.495
I
L
= 0.5A
I
L
= 1A
V
OUT
= 2.5V
12.5
TPC 1. Line Regulation Output
Voltage vs. Supply Voltage
OUTPUT LOAD – A
GROUND CURRENT
–
mA
0
0
0.2
0.4
0.6
0.8
V
OUT
= 2.5V
V
IN
= 6V
1.0
2
4
6
8
10
12
TPC 4. Ground Current vs. Load
Current
LOAD CURRENT – A
DROPOUT
–
mV
250
200
0
0
0.2
1.0
0.4
0.6
0.8
150
100
50
V
OUT
= 2.5V
TPC 7. Dropout Voltage vs.
Load Current
LOAD CURRENT – A
OUTPUT VOLTAGE
–
V
2.504
2.503
2.499
0
0.6
0.8
1.0
2.502
2.501
2.500
2.498
2.497
2.496
2.495
0.6
0.4
0.2
V
IN
= 6V
TPC 2. Output Voltage vs. Load
Current
IL = 0A
I
L
= 0.5A
I
L
= 1A
V
OUT
= 2.5V
V
IN
= 6V
I
L
= 0.3A
I
L
= 0.7A
JUNCTION TEMPERATURE – C
OUTPUT VOLTAGE
–
%
–0.05
–40 –20
0
20
40
60
80
100
120
0
0.1
0.2
0.3
0.4
TPC 5. Output Voltage Variation %
vs. Junction Temperature
0
1
2
3
4
5
6
7
8
9
10
TIME – sec
V
OUT
= 2.5V
R
LOAD
= 2.5
INPUT/OUTPUT VOLTAGE
–
V
0
1
2
3
TPC 8. Power-Up/Power-Down
INPUT VOLTAGE – V
GROUND CURRENT
–
A
0
0
2
4
6
8
V
OUT
= 2.5V
I
LOAD
= 0A
10
12
50
100
150
200
250
300
TPC 3. Ground Current vs. Supply
Voltage
JUNCTION TEMPERATURE – C
GROUND CURRENT
–
mA
0
–40
4
I
LOAD
= 700mA
I
LOAD
= 500mA
I
LOAD
= 300mA
I
LOAD
= 1A
–20
0
20
40
60
80 100 120 140 150
6
8
10
12
14
16
18
2
TPC 6. Ground Current vs. Junction
Temperature
3.5
80
TIME – s
V
OUT
= 2.5V
C
OUT
= 1 F
R
LOAD
= 2.5
120
140
180
4.5
2.50
2.49
2.51
VOLTS
TPC 9. Line Transient Response
REV. 0
–5–
ADP3338
3.5
80
TIME – s
V
OUT
= 2.5V
C
OUT
= 10 F
R
LOAD
= 2.5
120
140
180
4.5
2.50
2.49
2.51
VOLTS
TPC 10. Line Transient Response
0.4
TIME – s
0.6
0.8
1
2.5
V
IN
= 6V
400m
SHORT
A
VOLTS
0.0
1.5
1.0
0.5
0.0
FULL SHORT
TPC 13. Short-Circuit Current
FREQUENCY – Hz
10
100
1k
10k
100k
1M
C
L
= 1 F
0.001
0.01
0.1
1
10
100
C
L
= 10 F
VOLTAGE NOISE SPECTRAL DENSITY
–
V/
Hz
TPC 16. Output Noise Density
200
TIME – s
V
IN
= 6V
C
OUT
= 1 F
R
LOAD
= 2.5
T
300
600
800
0
2.5
2.4
2.6
A
VOLTS
1
TPC 11. Load Transient Response
FREQUENCY – Hz
10
100
1k
10k
100k
1M
V
OUT
= 2.5V
C
L
= 10 F
I
L
= 1A
C
L
= 1 F
I
L
= 1A
C
L
= 10 F
I
L
= 0
C
L
= 1 F
I
L
= 0
–80
–70
–60
–50
–40
–30
–20
–10
–90
0
RIPPLE REJECTION
–
dB
TPC 14. Power Supply Ripple
Rejection
0
200
TIME – s
V
IN
= 6V
C
OUT
= 10 F
1
2.5
2.4
2.6
T
400
600
800
A
VOLTS
TPC 12. Load Transient Response
C
L
– F
RMS NOISE
–
V
250
200
0
0
10
50
20
30
40
150
100
50
300
I
L
= 1A
I
L
= 0A
TPC 15. RMS Noise vs. C
L
(10 Hz–100 kHz)
REV. 0
ADP3338
–6–
THEORY OF OPERATION
The new anyCAP LDO ADP3338 uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2 which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
PTAT
V
OS
g
m
NONINVERTING
WIDEBAND
DRIVER
INPUT
Q1
ADP3338
COMPENSATION
CAPACITOR
ATTENUATION
(V
BANDGAP
/V
OUT
)
R1
D1
R2
R3
R4
OUTPUT
PTAT
CURRENT
(a)
GND
C
LOAD
R
LOAD
Figure 2. Functional Block Diagram
A very high-gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium pro-
duces a large, temperature-proportional input, “offset voltage”
that is repeatable and very well controlled. The temperature-
proportional offset voltage is combined with the complementary
diode voltage to form a “virtual bandgap” voltage, implicit in
the network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control
the loop with only one amplifier. This technique also improves
the noise characteristics of the amplifier by providing more flexibil-
ity on the trade-off of noise sources that leads to a low noise design.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor divider
is loaded by the diode D1 and a second divider consisting of R3
and R4, the values can be chosen to produce a temperature-stable
output. This unique arrangement specifically corrects for the load-
ing of the divider, thus avoiding the error resulting from base
current loading in conventional circuits.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole-splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to stabilize
due to the uncertainty of load capacitance and resistance. More-
over, the ESR value, required to keep conventional LDOs stable,
changes depending on load and temperature. These ESR limita-
tions make designing with LDOs more difficult because of their
unclear specifications and extreme variations over temperature.
With the ADP3338 anyCAP LDO, this is no longer true. It
can be used with virtually any good quality capacitor, with no
constraint on the minimum ESR. This innovative design allows
the circuit to be stable with just a small 1
µF capacitor on the
output. Additional advantages of the pole-splitting scheme include
superior line noise rejection and very high regulator gain, which
leads to excellent line and load regulation. An impressive
±1.4%
accuracy is guaranteed over line, load, and temperature.
Additional features of the circuit include current limit and ther-
mal shutdown.
V
IN
OUT
ADP3338
C1
1 F
C2
1 F
V
OUT
GND
IN
Figure 3. Typical Application Circuit
A
PPLICATION INFORMATION
CAPACITOR SELECTION
Output Capacitor
The stability and transient response of the LDO is a function of
the output capacitor. The ADP3338 is stable with a wide range
of capacitor values, types, and ESR (anyCAP). A capacitor as
low as 1
µF is all that is needed for stability. A higher capacitance
may be necessary if high output current surges are anticipated or
if the output capacitor cannot be located near the output and
ground pins. The ADP3338 is stable with extremely low ESR
capacitors (ESR
≈ 0), such as Multilayer Ceramic Capacitors
(MLCC) or OSCON. Note that the effective capacitance of
some capacitor types fall below the minimum over temperature
or with dc voltage.
Input Capacitor
An input bypass capacitor is not strictly required but it is recom-
mended in any application involving long input wires or high
source impedance. Connecting a 1
µF capacitor from the
input to ground reduces the circuit’s sensitivity to PC board
layout and input transients. If a larger output capacitor is neces-
sary, a larger value input capacitor is also recommended.
OUTPUT CURRENT LIMIT
The ADP3338 is short-circuit protected by limiting the pass
transistor’s base drive current. The maximum output current is
limited to about 2 A. See TPC 13.
REV. 0
ADP3338
–7–
THERMAL OVERLOAD PROTECTION
The ADP3338 is protected against damage due to excessive power
dissipation by its thermal overload protection circuit. Thermal
protection limits the die temperature to a maximum of 160
°C.
Under extreme conditions (i.e., high ambient temperature and
power dissipation) where the die temperature starts to rise above
160
°C, the output current will be reduced until the die tempera-
ture has dropped to a safe level.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, the device’s power dissipation should be externally
limited so that the junction temperature will not exceed 150
°C.
CALCULATING POWER DISSIPATION
Device power dissipation is calculated as follows:
P
V
V
I
V
I
D
IN
OUT
LOAD
IN
GND
=
−
(
)
×
+
( )
×
Where I
LOAD
and I
GND
are load current and ground current, V
IN
and V
OUT
are the input and output voltages respectively.
Assuming worst-case operating conditions are I
LOAD
= 1.0 A,
I
GND
= 10 mA, V
IN
= 3.3 V and V
OUT
= 2.5 V, the device power
dissipation is:
P
V
V
mA
V
mA
mW
D
=
(
)
+
(
)
=
3 3
2 5
1000
3 3
10
833
.
– .
.
So, for a junction temperature of 125
°C and a maximum ambi-
ent temperature of 85
°C, the required thermal resistance from
junction to ambient is:
θ
JA
=
°
° = °
125
85
0 833
48
C
C
W
C W
–
.
/
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
The SOT-223’s thermal resistance,
θ
JA
, is determined by the
sum of the junction-to-case and the case-to-ambient thermal
resistances. The junction-to-case thermal resistance,
θ
JC
, is
determined by the package design and specified at 26.8
°C/W.
However, the case-to-ambient thermal resistance is determined
by the printed circuit board design.
As shown in Figures 4a–c, the amount of copper the ADP3338
is mounted to affects the thermal performance. When mounted
to 2 oz. copper with just the minimal pads, Figure 4a, the
θ
JA
is
126.6
°C/W. By adding a small copper pad under the ADP3338,
Figure 4b, reduces the
θ
JA
to 102.9
°C/W. Increasing the copper
pad to 1 square inch, Figure 4c, reduces the
θ
JA
even further
to 52.8
°C/W.
a.
b.
c.
Figure 4. PCB Layouts
Use the following general guidelines when designing printed
circuit boards:
1. Keep the output capacitor as close to the output and ground
pins as possible.
2. Keep the input capacitor as close to the input and ground
pins as possible.
3. PC board traces with larger cross sectional areas will remove
more heat from the ADP3338. For optimum heat transfer,
specify thick copper and use wide traces.
4. The thermal resistance can be decreased by adding a copper
pad under the ADP3338 as shown in Figure 4b.
5. If possible, utilize the adjacent area to add more copper
around the ADP3338. Connecting the copper area to the
output of the ADP3338, as shown in Figure 4c, is best but
will improve thermal performance even if it is connected to
other signals.
6. Use additional copper layers or planes to reduce the thermal
resistance. Again, connecting the other layers to the output
of the ADP3338 is best, but not necessary. When connecting
the output pad to other layers use multiple vias.
REV. 0
–8–
C02050–1.5–6/01(0)
PRINTED IN U.S.A.
ADP3338
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
3-Lead Surface Mount
KC (SOT-223)
SEATING
PLANE
0.051 (1.30)
0.043 (1.10)
0.264 (6.70)
0.248 (6.30)
0.067 (1.70)
0.060 (1.50)
0.004 (0.10)
0.0008 (0.02)
0.181 (4.60)
NOM
10
MAX