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©
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 4
1
Publication Order Number:
MC74HC4851A/D
MC74HC4851A,
MC74HC4852A
Analog Multiplexers/
Demultiplexers with
Injection Current Effect
Control
Automotive Customized
These devices are pin compatible to standard HC405x and
MC1405xB analog mux/demux devices, but feature injection current
effect control. This makes them especially suited for usage in
automotive applications where voltages in excess of normal logic
voltage are common.
The injection current effect control allows signals at disabled analog
input channels to exceed the supply voltage range without affecting
the signal of the enabled analog channel. This eliminates the need for
external diode/ resistor networks typically used to keep the analog
channel signals within the supply voltage range.
The devices utilize low power silicon gate CMOS technology. The
Channel Select and Enable inputs are compatible with standard CMOS
outputs.
Injection Current Cross–Coupling Less than 1mV/mA (See Figure 9)
Pin Compatible to HC405X and MC1405XB Devices
Power Supply Range (VCC – GND) = 2.0 to 6.0 V
In Compliance With the Requirements of JEDEC Standard No. 7A
Chip Complexity: 154 FETs or 36 Equivalent Gates
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MARKING
DIAGRAMS
1
16
PDIP–16
N SUFFIX
CASE 648
HC485xAN
AWLYYWW
SOIC–16
D SUFFIX
CASE 751B
TSSOP–16
DT SUFFIX
CASE 948F
1
16
HC485xAD
AWLYWW
HC48
5xA
ALYW
1
16
A
= Assembly Location
WL or L
= Wafer Lot
YY or Y
= Year
WW or W = Work Week
SOIC–16 WIDE
DW SUFFIX
CASE 751G
1
16
HC485xADW
AWLYWW
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
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2
Figure 1. MC74HC4851A Logic Diagram
Single–Pole, 8–Position Plus Common Off
X0
13
X1
14
X2
15
X3
12
X4
1
X5
5
X6
2
X7
4
A
11
B
10
C
9
ENABLE
6
MULTIPLEXER/
DEMULTIPLEXER
X
3
ANALOG
INPUTS/
CHANNEL
INPUTS
PIN 16 = VCC
PIN 8 = GND
COMMON
OUTPUT/
INPUT
15
16
14
13
12
11
10
2
1
3
4
5
6
7
VCC
9
8
X2
X1
X0
X3
A
B
C
X4
X6
X
X7
X5
Enable
NC
GND
Figure 2. MC74HC4851A 16–Lead Pinout (Top View)
OUTPUTS
SELECT
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
X
FUNCTION TABLE – MC74HC4851A
Control Inputs
ON Channels
Enable
Select
C
B
A
X0
X1
X2
X3
X4
X5
X6
X7
NONE
L
L
L
L
L
L
L
L
H
Figure 3. MC74HC4852A Logic Diagram
Double–Pole, 4–Position Plus Common Off
X0
12
X1
14
X2
15
X3
11
Y0
1
Y1
5
Y2
2
Y3
4
A
10
B
9
ENABLE
6
X SWITCH
Y SWITCH
X
13
ANALOG
INPUTS/OUTPUTS
CHANNEL-SELECT
INPUTS
PIN 16 = VCC
PIN 8 = GND
COMMON
OUTPUTS/INPUTS
L
L
H
H
X
L
H
L
H
X
FUNCTION TABLE – MC74HC4852A
Control Inputs
ON Channels
Enable
Select
B
A
X0
X1
X2
X3
L
L
L
L
H
X = Don’t Care
Figure 4. MC74HC4852A 16–Lead Pinout (Top View)
15
16
14
13
12
11
10
2
1
3
4
5
6
7
VCC
9
8
X2
X1
X
X0
X3
A
B
Y0
Y2
Y
Y3
Y1
Enable
NC
GND
Y
3
Y0
Y1
Y2
Y3
NONE
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3
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MAXIMUM RATINGS*
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎ
ÎÎÎÎÎ
Value
ÎÎÎ
ÎÎÎ
Unit
ÎÎÎÎ
ÎÎÎÎ
VCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Positive DC Supply Voltage
(Referenced to GND)
ÎÎÎÎÎ
ÎÎÎÎÎ
– 0.5 to + 7.0
ÎÎÎ
ÎÎÎ
V
ÎÎÎÎ
ÎÎÎÎ
Vin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Input Voltage (Any Pin)
(Referenced to GND)
ÎÎÎÎÎ
ÎÎÎÎÎ
– 0.5 to VCC + 0.5
ÎÎÎ
ÎÎÎ
V
ÎÎÎÎ
ÎÎÎÎ
I
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Current, Into or Out of Any Pin
ÎÎÎÎÎ
ÎÎÎÎÎ
±
25
ÎÎÎ
ÎÎÎ
mA
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
PD
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Power Dissipation in Still Air,
Plastic DIP†
SOIC Package†
TSSOP Package†
ÎÎÎÎÎ
Î
ÎÎÎ
Î
ÎÎÎÎÎ
750
500
450
ÎÎÎ
Î
Î
Î
ÎÎÎ
mW
ÎÎÎÎ
ÎÎÎÎ
Tstg
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Storage Temperature Range
ÎÎÎÎÎ
ÎÎÎÎÎ
– 65 to + 150
ÎÎÎ
ÎÎÎ
_
C
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
TL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Lead Temperature, 1 mm from Case for 10 Seconds
Plastic DIP, SOIC or TSSOP Package
ÎÎÎÎÎ
Î
ÎÎÎ
Î
ÎÎÎÎÎ
260
ÎÎÎ
Î
Î
Î
ÎÎÎ
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/
_
C from 65
_
to 125
_
C
SOIC Package: – 7 mW/
_
C from 65
_
to 125
_
C
TSSOP Package: – 6.1 mW/
_
C from 65
_
to 125
_
C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Parameter
ÎÎÎ
ÎÎÎ
Min
ÎÎ
ÎÎ
Max
ÎÎÎ
ÎÎÎ
Unit
ÎÎÎÎ
ÎÎÎÎ
VCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Positive DC Supply Voltage
(Referenced to GND)
ÎÎÎ
ÎÎÎ
2.0
ÎÎ
ÎÎ
6.0
ÎÎÎ
ÎÎÎ
V
ÎÎÎÎ
ÎÎÎÎ
Vin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC Input Voltage (Any Pin)
(Referenced to GND)
ÎÎÎ
ÎÎÎ
GND
ÎÎ
ÎÎ
VCC
ÎÎÎ
ÎÎÎ
V
ÎÎÎÎ
ÎÎÎÎ
VIO*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Static or Dynamic Voltage Across Switch
ÎÎÎ
ÎÎÎ
0.0
ÎÎ
ÎÎ
1.2
ÎÎÎ
ÎÎÎ
V
ÎÎÎÎ
ÎÎÎÎ
TA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Operating Temperature Range, All Package Types
ÎÎÎ
ÎÎÎ
– 55
ÎÎ
ÎÎ
+ 125
ÎÎÎ
ÎÎÎ
_
C
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
tr, tf
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Input Rise/Fall Time
VCC = 2.0 V
(Channel Select or Enable Inputs)
VCC = 4.5 V
VCC = 6.0 V
ÎÎÎ
Î
Î
Î
ÎÎÎ
0
0
0
ÎÎ
ÎÎ
ÎÎ
1000
500
400
ÎÎÎ
Î
Î
Î
ÎÎÎ
ns
*For voltage drops across switch greater than 1.2V (switch on), excessive VCC current may be
drawn; i.e., the current out of the switch may contain both VCC and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
DC CHARACTERISTICS Digital Section
(Voltages Referenced to GND) VEE = GND, Except Where Noted
VCC
Guaranteed Limit
Symbol
Parameter
Condition
VCC
V
–55 to 25
°
C
85
°
C
125
°
C
Unit
VIH
Minimum High–Level Input
Voltage, Channel–Select or Enable
Inputs
Ron = Per Spec
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
VIL
Maximum Low–Level Input
Voltage, Channel–Select or Enable
Inputs
Ron = Per Spec
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
V
Iin
Maximum Input Leakage Current
on Digital Pins (Enable/A/B/C)
Vin = VCC or GND
6.0
±
0.1
±
1.0
±
1.0
µ
A
ICC
Maximum Quiescent Supply
Current (per Package)
Vin(digital) = VCC or GND
Vin(analog) = GND
6.0
2
20
40
µ
A
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND
v
(Vin or Vout)
v
VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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DC CHARACTERISTICS — Analog Section
Guaranteed Limit
Symbol
Parameter
Condition
VCC
–55 to 25
°
C
85
°
C
125
°
C
Unit
Ron
Maximum “ON” Resistance
Vin = VIL or VIH;VIS = VCC to
GND; IS
2.0 mA
2.0
3.0
4.5
6.0
1700
1100
550
400
1750
1200
650
500
1800
1300
750
600
Ron
Delta “ON” Resistance
Vin = VIL or VIH; VIS = VCC/2
IS
2.0 mA
2.0
3.0
4.5
6.0
300
160
80
60
400
200
100
80
500
240
120
100
Ioff
Maximum Off–Channel Leakage
Current,
Any One Channel
Common Channel
Vin = VCC or GND
6.0
±
0.1
±
0.2
±
0.5
±
2.0
±
1.0
±
4.0
µ
A
Ion
Maximum On–Channel Leakage
Channel–to–Channel
Vin = VCC or GND
6.0
±
0.2
±
2.0
±
4.0
µ
A
AC CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
VCC
–55 to 25
°
C
85
°
C
125
°
C
Unit
tPHL,
tPLH
Maximum Propagation Delay, Analog Input to Analog Output
2.0
3.0
4.5
6.0
160
80
40
30
180
90
45
35
200
100
50
40
ns
tPHL, tPHZ,PZH
tPLH, tPLZ,PZL
Maximum Propagation Delay, Enable or Channel–Select to
Analog Output
2.0
3.0
4.5
6.0
260
160
80
60
280
180
90
70
300
200
100
80
ns
Cin
Maximum Input Capacitance
Digital Pins
(All Switches Off)
Any Single Analog Pin
(All Switches Off)
Common Analog Pin
10
35
130
10
35
130
10
35
130
pF
CPD
Power Dissipation Capacitance
Typical
5.0
20
pF
INJECTION CURRENT COUPLING SPECIFICATIONS
(VCC = 5V, TA = –55
°
C to +125
°
C)
Symbol
Parameter
Typ
Max
Unit
Condition
V
out
Maximum Shift of Output Voltage of Enabled Analog
Channel
0.1
1.0
0.5
5.0
1.0
5.0
2.0
20
mV
Iin*
1mA, RS
3,9k
Iin*
10mA, RS
3,9k
Iin*
1mA, RS
20k
Iin*
10mA, RS
20k
* Iin = Total current injected into all disabled channels.
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Figure 5. Typical On Resistance VCC = 2V
Figure 6. Typical On Resistance VCC = 3V
Figure 7. Typical On Resistance VCC = 4.5V
Figure 8. Typical On Resistance VCC = 6V
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
R
on
, ON RESIST
ANCE
(OHMS)
–55
°
C
+25
°
C
+125
°
C
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
R
on
, ON RESIST
ANCE
(OHMS)
–55
°
C
+25
°
C
+125
°
C
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
R
on
, ON RESIST
ANCE
(OHMS)
–55
°
C
+25
°
C
+125
°
C
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
R
on
, ON RESIST
ANCE
(OHMS)
–55
°
C
+25
°
C
+125
°
C
1100
1000
900
800
700
600
500
400
300
200
100
0
1100
1000
900
800
700
600
500
400
300
200
100
0
660
600
540
480
420
360
300
240
180
120
60
0
440
400
360
320
280
240
200
160
120
80
40
0
0.0
0.9
1.8
2.7
3.6
4.5
0.0
1.2
2.4
3.6
4.8
6.0
0.0
0.4
0.8
1.2
1.6
2.0
0.0
0.6
1.2
1.8
2.4
3.0
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VCC = 5V
Iin
Vin2 < VSS or VCC < Vin2
Any Disabled Channel
VSS < Vin1 < VCC
Enabled Channel
RS
Vout = Vin1
±
V
out
Figure 9. Injection Current Coupling Specification
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
Common Out
VCC
HC4051A
Microcontroller
A/D – Input
VCC
5V
6V
5V
Sensor
(8x Identical Circuitry)
Figure 10. Actual Technology
Requires 32 passive components and one extra 6V regulator
to suppress injection current into a standard HC4051 multiplexer
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
Common Out
VCC
HC4851A
Microcontroller
A/D – Input
VCC
5V
Sensor
(8x Identical Circuitry)
Figure 11. MC74HC4851A Solution
Solution by applying the HC4851A multiplexer
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Figure 12. On Resistance Test
Set–Up
PLOTTER
MINI COMPUTER
PROGRAMMABLE
POWER
SUPPLY
DC ANALYZER
VCC
DEVICE
UNDER TEST
+
ANALOG IN
COMMON OUT
GND
Figure 13. Maximum Off Channel Leakage Current,
Any One Channel, Test Set–Up
OFF
OFF
6
8
16
COMMON O/I
VCC
VIH
NC
A
VCC
VEE
VCC
Figure 14. Maximum Off Channel Leakage Current,
Common Channel, Test Set–Up
OFF
OFF
6
8
16
COMMON O/I
VCC
VIH
ANALOG I/O
VCC
VEE
VCC
Figure 15. Maximum On Channel Leakage Current,
Channel to Channel, Test Set–Up
ON
OFF
6
8
16
COMMON O/I
VCC
VIL
VCC
VEE
VCC
N/C
A
ANALOG I/O
Figure 16. Propagation Delays, Channel Select
to Analog Out
Figure 17. Propagation Delay, Test Set–Up Channel
Select to Analog Out
VCC
GND
CHANNEL
SELECT
ANALOG
OUT
50%
tPLH
tPHL
50%
ON/OFF
6
8
16
VCC
CL*
*Includes all probe and jig capacitance
CHANNEL SELECT
TEST
POINT
COMMON O/I
OFF/ON
ANALOG I/O
VCC
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Figure 18. Propagation Delays, Analog In
to Analog Out
Figure 19. Propagation Delay, Test Set–Up
Analog In to Analog Out
Figure 20. Propagation Delays, Enable to
Analog Out
Figure 21. Propagation Delay, Test Set–Up
Enable to Analog Out
VCC
GND
ANALOG
IN
ANALOG
OUT
50%
tPLH
tPHL
50%
ON
6
8