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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

REV 7

Motorola, Inc. 1995

10/95

Analog Multiplexers/

Demultiplexers

High–Performance Silicon–Gate CMOS

The MC54/74HC4051, MC74HC4052 and MC54/74HC4053 utilize sili-

con–gate CMOS technology to achieve fast propagation delays, low ON

resistances, and low OFF leakage currents. These analog multiplexers/

demultiplexers control analog voltages that may vary across the complete

power supply range (from VCC to VEE).

The HC4051, HC4052 and HC4053 are identical in pinout to the

metal–gate MC14051B, MC14052B and MC14053B. The Channel–Select

inputs determine which one of the Analog Inputs/Outputs is to be connected,

by means of an analog switch, to the Common Output/Input. When the

Enable pin is HIGH, all analog switches are turned off.

The Channel–Select and Enable inputs are compatible with standard

CMOS outputs; with pullup resistors they are compatible with LSTTL

outputs.

These devices have been designed so that the ON resistance (Ron) is

more linear over input voltage than Ron of metal–gate CMOS analog

switches.

For multiplexers/demultiplexers with channel–select latches, see

HC4351, HC4352 and HC4353.

•

Fast Switching and Propagation Speeds

•

Low Crosstalk Between Switches

•

Diode Protection on All Inputs/Outputs

•

Analog Power Supply Range (VCC – VEE) = 2.0 to 12.0 V

•

Digital (Control) Power Supply Range (VCC – GND) = 2.0 to 6.0 V

•

Improved Linearity and Lower ON Resistance Than Metal–Gate

Counterparts

•

Low Noise

•

In Compliance With the Requirements of JEDEC Standard No. 7A

•

Chip Complexity: HC4051 — 184 FETs or 46 Equivalent Gates

HC4052 — 168 FETs or 42 Equivalent Gates

HC4053 — 156 FETs or 39 Equivalent Gates

LOGIC DIAGRAM

MC54/74HC4051

Single–Pole, 8–Position Plus Common Off

ENABLE

MULTIPLEXER/

DEMULTIPLEXER

ANALOG

INPUTS/

CHANNEL

INPUTS

PIN 16 = VCC

PIN 7 = VEE

PIN 8 = GND

COMMON

OUTPUT/

INPUT

VCC

Enable VEE GND

Pinout: MC54/74HC4051 (Top View)

OUTPUTS

SELECT

MC54/74HC4051

MC74HC4052

MC54/74HC4053

FUNCTION TABLE – MC54/74HC4051

Control Inputs

ON Channels

Enable

Select

NONE

X = Don’t Care

D SUFFIX

SOIC PACKAGE

CASE 751B–05

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

J SUFFIX

CERAMIC PACKAGE

CASE 620–10

ORDERING INFORMATION

MC54HCXXXXJ

MC74HCXXXXN

MC74HCXXXXD

MC74HCXXXXDW

MC74HCXXXXDT

Ceramic

Plastic

SOIC

SOIC Wide

TSSOP

DT SUFFIX

TSSOP PACKAGE

CASE 948F–01

DW SUFFIX

SOIC PACKAGE

CASE 751G–02

MC54/74HC4051 MC74HC4052 MC54/74HC4053

MOTOROLA

High–Speed CMOS Logic Data

DL129 — Rev 6

LOGIC DIAGRAM

MC74HC4052

Double–Pole, 4–Position Plus Common Off

ENABLE

X SWITCH

Y SWITCH

ANALOG

INPUTS/OUTPUTS

CHANNEL-SELECT

INPUTS

PIN 16 = VCC

PIN 7 = VEE

PIN 8 = GND

COMMON

OUTPUTS/INPUTS

FUNCTION TABLE – MC74HC4052

Control Inputs

ON Channels

Enable

Select

X = Don’t Care

Pinout: MC74HC4052 (Top View)

VCC

Enable VEE GND

NONE

LOGIC DIAGRAM

MC54/74HC4053

Triple Single–Pole, Double–Position Plus Common Off

ENABLE

X SWITCH

Y SWITCH

ANALOG

INPUTS/OUTPUTS

CHANNEL-SELECT

INPUTS

PIN 16 = VCC

PIN 7 = VEE

PIN 8 = GND

COMMON

OUTPUTS/INPUTS

FUNCTION TABLE – MC54/74HC4053

Control Inputs

ON Channels

Enable

Select

X = Don’t Care

Pinout: MC54/74HC4053 (Top View)

VCC

Enable VEE GND

NONE

Z SWITCH

NOTE: This device allows independent control of each switch.

Channel–Select Input A controls the X–Switch, Input B controls

the Y–Switch and Input C controls the Z–Switch

MC54/74HC4051 MC74HC4052 MC54/74HC4053

High–Speed CMOS Logic Data

DL129 — Rev 6

MOTOROLA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

MAXIMUM RATINGS*

ÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎÎÎÎ

Value

ÎÎÎ

Unit

ÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Positive DC Supply Voltage

(Referenced to GND)

(Referenced to VEE)

ÎÎÎÎÎÎ

– 0.5 to + 7.0

– 0.5 to + 14.0

ÎÎÎ

VEE

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Negative DC Supply Voltage (Referenced to GND)

ÎÎÎÎÎÎ

– 7.0 to + 5.0

ÎÎÎ

VIS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Analog Input Voltage

ÎÎÎÎÎÎ

VEE – 0.5 to

VCC + 0.5

ÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Digital Input Voltage (Referenced to GND)

ÎÎÎÎÎÎ

– 0.5 to VCC + 0.5

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Current, Into or Out of Any Pin

ÎÎÎÎÎÎ

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Power Dissipation in Still Air, Plastic or Ceramic DIP†

SOIC Package†

TSSOP Package†

ÎÎÎÎÎÎ

750

500

450

ÎÎÎ

Tstg

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Storage Temperature Range

ÎÎÎÎÎÎ

– 65 to + 150

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Lead Temperature, 1 mm from Case for 10 Seconds

Plastic DIP, SOIC or TSSOP Package

Ceramic DIP

ÎÎÎÎÎÎ

260

300

ÎÎÎ

* Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/

C from 65

to 125

Ceramic DIP: – 10 mW/

C from 100

to 125

SOIC Package: – 7 mW/

C from 65

to 125

TSSOP Package: – 6.1 mW/

C from 65

to 125

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

ÎÎÎÎ

Symbol

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Parameter

ÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Positive DC Supply Voltage

(Referenced to GND)

(Referenced to VEE)

ÎÎÎ

2.0

ÎÎÎ

6.0

12.0

ÎÎÎ

ÎÎÎÎ

VEE

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Negative DC Supply Voltage, Output (Referenced to

GND)

ÎÎÎ

– 6.0

ÎÎÎ

GND

ÎÎÎ

ÎÎÎÎ

VIS

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Analog Input Voltage

ÎÎÎ

VEE

ÎÎÎ

VCC

ÎÎÎ

ÎÎÎÎ

Vin

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Digital Input Voltage (Referenced to GND)

ÎÎÎ

GND

ÎÎÎ

VCC

ÎÎÎ

ÎÎÎÎ

VIO*

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Static or Dynamic Voltage Across Switch

ÎÎÎ

1.2

ÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Operating Temperature Range, All Package Types

ÎÎÎ

– 55

ÎÎÎ

+ 125

ÎÎÎ

ÎÎÎÎ

tr, tf

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Rise/Fall Time

VCC = 2.0 V

(Channel Select or Enable Inputs)

VCC = 4.5 V

VCC = 6.0 V

ÎÎÎ

1000

500

400

ÎÎÎ

* For voltage drops across switch greater than 1.2V (switch on), excessive VCC current may be

drawn; i.e., the current out of the switch may contain both VCC and switch input components. The

reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high–impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND

(Vin or Vout)

VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

MC54/74HC4051 MC74HC4052 MC54/74HC4053

MOTOROLA

High–Speed CMOS Logic Data

DL129 — Rev 6

DC CHARACTERISTICS — Digital Section

(Voltages Referenced to GND) VEE = GND, Except Where Noted

Symbol

Parameter

Condition

VCC

Guaranteed Limit

Unit

Symbol

Parameter

Condition

VCC

–55 to 25

≤

125

Unit

VIH

Minimum High–Level Input Voltage,

Channel–Select or Enable Inputs

Ron = Per Spec

2.0

4.5

6.0

1.50

3.15

4.20

1.50

3.15

4.20

1.50

3.15

4.20

VIL

Maximum Low–Level Input Voltage,

Channel–Select or Enable Inputs

Ron = Per Spec

2.0

4.5

6.0

0.3

0.9

1.2

0.3

0.9

1.2

0.3

0.9

1.2

Iin

Maximum Input Leakage Current,

Channel–Select or Enable Inputs

Vin = VCC or GND,

VEE = – 6.0 V

6.0

0.1

1.0

ICC

Maximum Quiescent Supply

Current (per Package)

Channel Select, Enable and

VIS = VCC or GND;

VEE = GND

VIO = 0 V

VEE = – 6.0

6.0

160

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

DC CHARACTERISTICS — Analog Section

Symbol

Parameter

Condition

VCC

VEE

Guaranteed Limit

Unit

Symbol

Parameter

Condition

VCC

VEE

–55 to 25

≤

125

Unit

Ron

Maximum “ON” Resistance

Vin = VIL or VIH; VIS = VCC to

VEE; IS

≤

2.0 mA

(Figures 1, 2)

4.5

6.0

0.0

– 4.5

– 6.0

190

120

100

240

150

125

280

170

140

Ω

Vin = VIL or VIH; VIS = VCC or

VEE (Endpoints); IS

≤

2.0 mA

(Figures 1, 2)

4.5

6.0

0.0

– 4.5

– 6.0

150

100

190

125

100

230

140

115

∆

Ron

Maximum Difference in “ON”

Resistance Between Any Two

Channels in the Same Package

Vin = VIL or VIH;

VIS = 1/2 (VCC – VEE);

≤

2.0 mA

4.5

6.0

0.0

– 4.5

– 6.0

Ω

Ioff

Maximum Off–Channel Leakage

Current, Any One Channel

Vin = VIL or VIH;

VIO = VCC – VEE;

Switch Off (Figure 3)

6.0

– 6.0

0.1

0.5

1.0

Maximum Off–Channel

HC4051

Leakage Current,

HC4052

Common Channel

HC4053

Vin = VIL or VIH;

VIO = VCC – VEE;

Switch Off (Figure 4)

6.0

– 6.0

0.2

0.1

2.0

1.0

4.0

2.0

Ion

Maximum On–Channel HC4051

Leakage Current,

HC4052

Channel–to–Channel

HC4053

Vin = VIL or VIH;

Switch–to–Switch =

VCC – VEE; (Figure 5)

6.0

– 6.0

0.2

0.1

2.0

1.0

4.0

2.0