A23L1616/A23L16161/A23L16162 Series
Preliminary
2M X 16 / 4M X 8 BIT CMOS MASK ROM
PRELIMINARY (September, 2002, Version 0.1)
AMIC Technology, Inc.
Document Title
2M X 16 / 4M X 8 BIT CMOS MASK ROM
Revision History
Rev. No. History
Issue Date
Remark
0.0
Initial issue
June 26, 2001
Preliminary
0.1 Change Access Time: September 13, 2002
From 100ns(max.)/3.0V~3.6V to 70ns(max.)/3.0V~3.6V &
From 120ns(max.)/2.7V~3.6V to 100ns(max.)/2.7V~3.6V
Change Operating Current:
From 40mA(max.)/3.6V to 40mA(typ.)/3.3V
Change Standby Current:
From 30
µ
A(max.)/3.6V to 10
µ
A(typ.)/3.3V
A23L1616/A23L16161/A23L16162 Series
Preliminary
2M X 16 / 4M X 8 BIT CMOS MASK ROM
PRELIMINARY (September, 2002, Version 0.1)
1
AMIC Technology, Inc.
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
CE
OE
O0
O14
O8
O7
O15/A-1
GND
BYTE
A15
A14
A12
A11
A10
A9
A8
A19
A20
A13
A23L1616M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
A0
GND
O1
O9
O2
O10
O3
17
18
19
20
21
A16
O6
O13
O5
O12
O4
28
27
26
25
24
22
O11
VCC
23
Features
n
2M x 16 bit or 4M x 8 bit organization
n
Supply voltage range: 2.7V~3.6V
n
Access time: 70ns (max.)/3.0V~3.6V
100ns (max.)/2.7V~3.6V
n
Current: Operating: 40mA (typ.)/3.3V
Standby: 10
µ
A (typ.)/3.3V
n
Three-state outputs for wired-OR expansion
n
Full static operation
n
All inputs and outputs are directly TTL-compatible
n
Flash memory pinout compatible with AMD
(A23L16161) and Intel (A23L16162)
n
Available in 44-pin SOP, 48-pin TSOP (forward,
reverse type and flash memory’s pinouts compatible)
packages
Pin Configurations
n
n
SOP
n
n
TSOP (forward type)
n
n
TSOP (reverse type)
A23L1616V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A16
A15
A14
A13
A12
A11
A10
A8
A19
GND
A20
A18
A17
A7
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
O10
O3
O11
NC
VCC
VCC
O4
O12
O5
O13
O6
O14
O7
O15/A-1
GND
GND
BYTE
A9
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
O2
O9
O1
O8
O0
OE
GND
GND
A6
A5
A4
A3
A2
A1
A0
CE
A23L1616R
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GND
O15/A-1
O7
O14
O6
O13
O5
O4
VCC
VCC
NC
O11
O3
O10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A7
A17
A18
A20
GND
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
GND
O12
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A6
A5
A4
A3
A2
A1
A0
CE
O2
O9
O1
O8
O0
OE
GND
GND
A23L1616/A23L16161/A23L16162 Series
PRELIMINARY (September, 2002, Version 0.1)
2
AMIC Technology, Inc.
Pin Configurations (continued)
n
n
TSOP (forward type)
A23L16161V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A14
A13
A12
A11
A10
A9
A8
A20
NC
NC
NC
NC
NC
A18
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
O2
O10
O3
O11
VCC
O4
O12
O5
O13
O6
O14
O7
O15/A-1
GND
BYTE
A16
A15
A19
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
O9
O1
O8
O0
OE
GND
CE
A0
A17
A7
A6
A5
A4
A3
A2
A1
n
n
TSOP (forward type)
A23L16162V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A14
A13
A12
A11
A10
A9
A8
A20
NC
NC
NC
NC
A19
A18
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
O2
O10
O3
O11
VCC
O4
O12
O5
O13
O6
O14
O7
O15
GND
VCC
A16
A15
NC
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
O9
O1
O8
O0
OE
GND
CE
A0
A17
A7
A6
A5
A4
A3
A2
A1
A23L1616/A23L16161/A23L16162 Series
PRELIMINARY (September, 2002, Version 0.1)
3
AMIC Technology, Inc.
Block Diagram
ROW
DECODER
DRIVER
MEMORY CELL
ARRAY
COLUMN SELECTOR CIRCUITRY
COLUMN
DECODER
DRIVER
POWER-DOWN
DOWN OR
OUTPUT
ENABLE
CIRCUITRY
BYTE
CIRCUITRY
(A-1) A0 - A20
ADDRESS
INPUTS
O6
O5
O4
O3
O2
O1
O0
CE
OE
O7
(O8)
(O9)
(O10)
(O11)
(O12)
(O13)
(O14)
(O15)
BYTE
A23L1616/A23L16161/A23L16162 Series
PRELIMINARY (September, 2002, Version 0.1)
4
AMIC Technology, Inc.
Pin Descriptions
Pin No.
44L SOP
(A23L1616)
48L TSOP
(A23L1616)
48L TSOP
(A23L16161)
48L TSOP
(A23L16162)
Symbol
Description
2-11,
34-44
2-11,
13-23
1-10,
16-25, 48
1-8, 10
15-25, 48
A0-A20
Address Inputs
15-22,
24-30
28-35,
39-45
29-36,
38-44
29-36,
38-44
O0-O14
Data Outputs
31
46
45
45
O15/A-1
Output 15(WORD mode)
/LSB Address (BYTE mode)
12
24
26
26
CE
Chip Enable Input
14
27
28
28
OE
Output Enable Input
33
1
47
-
BYTE
BYTE or WORD mode Selection
23
37-38
37
37, 47
VCC
Power Supply
13, 32
12, 25-26,
47-48
27, 46
27, 46
GND
Ground
1
36
11-15
9, 11-14
NC
No Connection
Recommended DC Operating Conditions
(T
A
= 0
°
C to + 70
°
C)
Symbol
Parameter
Min.
Max.
Unit
VCC
Supply Voltage
2.7
3.6
V
GND
Ground
0
0
V
V
IH
Input High Voltage
2.2
VCC+0.3
V
V
IL
Input Low Voltage
- 0.3
0.6
V
A23L1616/A23L16161/A23L16162 Series
PRELIMINARY (September, 2002, Version 0.1)
5
AMIC Technology, Inc.
Absolute Maximum Ratings*
Ambient Operating Temperature . . . . . . . . 0
°
C to + 70
°
C
Storage Temperature . . . . . . . . . . . . . . -65
°
C to + 125
°
C
Output Voltage . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may affect
device reliability.
DC Electrical Characteristics
(T
A
= 0
°
C to + 70
°
C, VCC = 3.0V~3.6V, GND = 0V)
Symbol
Parameter
Min.
Max.
Unit
Conditions
Note
V
OH
Output High Voltage
2.4
V
I
OH
= -0.4mA (3V)
V
OL
Output Low Voltage
0.4
V
I
OL
= 1.6mA (3V)
V
lH
Input High Voltage
2.2
VCC + 0.3
V
V
lL
Input Low Voltage
-0.3
0.6
V

l
LI

Input Leakage Current
+10
µ
A
VCC = max.
V
IN
= VCC to GND

l
LO

Output Leakage Current
+10
µ
A
VCC = max.
V
OUT
= VCC to GND
1
I
CC
Operating Supply Current
60
mA
t
CYC
= min.
2
I
SB
Standby Supply Current (TTL)
1.5
mA
CE = V
IH
I
SB1
Standby Supply Current (CMOS)
30
µ
A
CE VCC - 0.2V
A23L1616/A23L16161/A23L16162 Series
PRELIMINARY (September, 2002, Version 0.1)
6
AMIC Technology, Inc.
Capacitance
Symbol
Parameter
Min.
Max.
Unit
Test Conditions
Note
C
I
Input Capacitance
10
pF
T
A
= 25
°
C
3
C
O
Output Capacitance
10
pF
f = 1.0MHz
AC Characteristics
(T
A
= 0
°
C to +70
°
C, VCC = 2.7V~3.6V for -12, VCC = 3.0V~3.6V for -10, GND = 0V)
Symbol
Parameter
A23L1616/A23L16
161/A23L16162-70
A23L1616/A23L161
61/A23L16162-100
Unit
Note
Min.
Max.
Min.
Max.
t
CYC
Cycle Time
70
100
ns
t
AA
Address Access Time
70
100
ns
t
ACE
Chip Enable Access Time
70
100
ns
t
AOE
Output Enable Access Time
35
50
ns
t
OH
Output Hold after Address Change
10
10
ns
t
LZ
Output Low Z Delay
10
10
ns
4, 6
t
HZ
Output High Z Delay*
20
20
ns
5, 6
* t
HZ
is specified from either OE or CE going disabled, whichever occurs first.
Notes:
1. OE / CE = V
IH
(Output is unloaded)
2. V
IN
= V
IH
/V
IL,
OE / CE = V
IL
(Output is unloaded)
3. This parameter is periodically sampled and is not 100% tested. All pins, except pins under test, are tied to AC ground.
4. Output LOW impedance delay (t
LZ
) is measured from CE or OE going active.
5. Output HIGH impedance delay (t
HZ
) is measured from CE or OE going inactive.
6. This parameter is sampled and not 100% tested.
A23L1616/A23L16161/A23L16162 Series
PRELIMINARY (September, 2002, Version 0.1)
7
AMIC Technology, Inc.
Timing Waveforms
Propagation Delay from Address ( CE = Active, OE = Active)
t
AA
VALID
VALID
t
CYC
t
OH
ADDRESS
INPUTS
DATA OUT
Propagation Delay from Chip Enable or Output Enable (Address Valid)
t
ACE
t
HZ
VALID
t
LZ
DATA OUT
t
AOE
CHIP
ENABLE
OUTPUT
ENABLE
VALID
VALID
AC Test Conditions
Part No.
A23L1616/A23L16161/A23L16162-70 A23L1616/A23L16161/A23L16162-100
Applied Voltage
3.0V~3.6V
2.7V~3.6V
Input Pulse Levels
0.4V to 2.4V
0.4V to 2.4V
Input Rise and Fall Time
10 ns
10 ns
Timing Measurement Reference Level
V
IN
= 1.4V, V
OUT
= 1.4V
V
IN
= 1.4V, V
OUT
= 1.4V
Output Load
1 TTL gate and C
L
= 100pF
1 TTL gate and C
L
= 100pF
A23L1616/A23L16161/A23L16162 Series
PRELIMINARY (September, 2002, Version 0.1)
8
AMIC Technology, Inc.
Function Table
CE
OE /NC
BYTE
O15/A-1
O0 - O7
O8 - O15
Mode
L
L
H
Data Pin O15
Data Out
Data out
Word
L
L
L
LSB Address A-1
Data Out
Hi - Z
Byte
H
X
X
X
Hi - Z
Hi - Z
Power-down
L
H
X
X
Hi - Z
Hi - Z
Output Disable
Ordering Information
Part No.
Access Time (ns)
Package
A23L1616M-70
70
44L SOP
A23L1616M-100
10