NC7SZ125 TinyLogic? UHS Buffer with 3-STATE Output

DS012161

www.fairchildsemi.com

October 1996

Revised April 2001

NC7SZ12

5 T

iny

Logic



UHS Buf

fer

3-ST

E Out

put

NC7SZ125

TinyLogic



UHS Buffer with 3-STATE Output

General Description

The NC7SZ125 is a single buffer with 3-STATE output from

Fairchild’s Ultra High Speed Series of TinyLogic



. The

device is fabricated with advanced CMOS technology to

achieve ultra high speed with high output drive while main-

taining low static power dissipation over a very broad V

operating range. The device is specified to operate over

the 1.65V to 5.5V range.

The inputs and output are high impedance above ground

when V

is 0V. Inputs tolerate voltages up to 6V indepen-

dent of V

operating voltage. The output tolerates volt-

ages above V

when in the 3-STATE condition.

Features

Space saving SOT23 or SC70 5-lead package

Ultra small MicroPak



leadless package

Ultra High Speed; t

2.6 ns Typ into 50 pF at 5V V

High Output Drive;

24 mA at 3V V

Broad V

Operating Range; 1.65V to 5.5V

Matches the performance of LCX when operated at

3.3V V

Power down high impedance inputs/output

Overvoltage Tolerant inputs facilitate 5V to 3V

translation

Patented noise/EMI reduction circuitry implemented

Ordering Code:

Logic Symbol

IEEE/IEC

Connection Diagram

(Top View)

Pin Descriptions

Function Table

HIGH Logic Level

LOW Logic Level

HIGH or LOW Logic Level

HIGH Impedance State

TinyLogic



and MicroPak



are trademarks of Fairchild Semiconductor Corporation.

Product

Package

Product Code

Package Description

Supplied As

Number

Drawing

Top Mark

NC7SZ125M5X

MA05B

7Z25

5-Lead SOT23, JEDEC MO-178, 1.6mm

3k Units on Tape and Reel

NC7SZ125P5X

MAA05A

Z25

5-Lead SC70, EIAJ SC-88a, 1.25mm Wide

3k Units on Tape and Reel

NC7SZ125L6X

MAC06A

(Preliminary)

TBD

6-Lead, MicroPak, Ceramic, 1.0mm Wide

TBD

Pin Names

Description

A, OE

Inputs

Output

Inputs

Output

In A

Out Y

www.fairchildsemi.com

NC7SZ125

Absolute Maximum Ratings

(Note 1)

Recommended Operating

Conditions

(Note 2)

Note 1: Absolute maximum ratings are DC values beyond which the device

may be damaged or have its useful life impaired. The datasheet specifica-

tions should be met, without exception, to ensure that the system design is

reliable over its power supply, temperature, and output/input loading vari-

ables. Fairchild does not recommend operation outside datasheet specifi-

cations.

Note 2: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Supply Voltage (V

)

−

0.5V to

DC Input Voltage (V

)

−

0.5V to

DC Output Voltage (V

OUT

)

−

0.5V to

DC Input Diode Current (I

)

−

0.5V

−

50 mA

@ V

20 mA

DC Output Diode Current (I

)

OUT

−

0.5V

−

50 mA

@ V

OUT

6V, V

GND

20 mA

DC Output Current (I

OUT

)

50 mA

DC V

/GND Current (I

GND

)

50 mA

Storage Temperature (T

STG

)

−

C to

150

Junction Temperature under Bias (T

)

150

Junction Lead Temperature (T

);

(Soldering, 10 seconds)

260

Power Dissipation (P

) @

SOT23-5

200 mW

SC70-5

150 mW

Supply Voltage Operating (V

)

1.65V to 5.5V

Supply Voltage Data Retention (V

)

1.5V to 5.5V

Input Voltage (V

)

0V to 5.5V

Output Voltage (V

OUT

)

Active State

0V to V

3-STATE

5.5V

Operating Temperature (T

)

−

C to

Input Rise and Fall Time (t

, t

)

1.8V, 2.5V

0.2V

0 ns/V to 20 ns/V

3.3V

0.3V

0 ns/V to 10 ns/V

5.0V

0.5V

0 ns/V to 5 ns/V

Thermal Resistance (

)

SOT23-5

300

C/W

SC70-5

425

C/W

Symbol

Parameter

−

C to

Units

Conditions

(V)

Min

Typ

Max

Min

Max

HIGH Level Input Voltage

1.65 to 1.95 0.75 V

0.75 V

2.3 to 5.5

0.7 V

LOW Level Input Voltage

1.65 to 1.95

0.25 V

2.3 to 5.5

0.3 V

HIGH Level Output Voltage

1.65

1.55

1.65

1.55

−

100

1.8

1.7

1.8

1.7

2.3

2.2

2.3

2.2

3.0

2.9

3.0

2.9

4.5

4.4

4.5

4.4

1.65

1.29

1.52

1.29

−

4 mA

2.3

1.9

2.15

1.9

−

8 mA

3.0

2.4

2.80

2.4

−

16 mA

3.0

2.3

2.68

2.3

−

24 mA

4.5

3.8

4.20

3.8

−

32 mA

LOW Level Output Voltage

1.65

0.0

0.1

0.0

100

1.8

0.0

0.1

2.3

0.0

0.1

3.0

0.0

0.1

4.5

0.0

0.1

1.65

0.08

0.24

2.3

0.10

0.3

3.0

0.15

0.4

16 mA

3.0

0.22

0.55

24 mA

4.5

0.22

0.55

32 mA

Input Leakage Current

0 to 5.5

≤

5.5V

3-STATE

1.65 to 5.5

or V

Output Leakage

≤

5.5V

OFF

Power Off Leakage Current

0.0

or V

OUT

5.5V

Quiescent Supply Current

1.65 to 5.5

2.0

5.5V, GND

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NC7SZ12

AC Electrical Characteristics

Note 3: C

is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I

CCD

) at no output

loading and operating at 50% duty cycle. (See Figure 2.) C

is related to I

CCD

dynamic operating current by the expression:

CCD

)(V

)(f

)

static).

AC Loading and Waveforms

includes load and stray capacitance

Input PRR

1.0 MHz; t

500 ns

FIGURE 1. AC Test Circuit

Input

AC Waveform; t

1.8 ns;

PRR

10 MHz; Duty Cycle

50%

FIGURE 2. I

CCD

Test Circuit

FIGURE 3. AC Waveforms

Symbol

Parameter

−

C to

Units

Conditions

Figure

(V)

Min

Typ

Max

Min

Max

Number

PLH

Propagation Delay

1.65

2.0

6.4

13.2

2.0

13.8

Figures

1, 3

PHL

1.8

2.0

5.3

11.0

2.0

11.5

15 pF,

2.5

0.2

0.8

3.4

7.5

0.8

8.0

1 M

Ω

3.3

0.3

0.5

2.5

5.2

0.5

5.5

OPEN

5.0

0.5

2.1

4.5

0.5

4.8

PLH

Propagation Delay

3.3

0.3

1.5

3.2

5.7

1.5

6.0

50 pF, R

500

Ω

Figures

1, 3

PHL

5.0

0.5

0.8

2.6

5.0

0.8

5.3

OPEN

PZL

Output Enable Time

1.65

2.0

8.4

15.0

2.0

15.6

50 pF, RD

500

Ω

Figures

1, 3

PZH

1.8

2.0

7.0

12.5

2.0

500

Ω

2.5

0.2

1.5

4.6

8.5

1.5

GND for t

PZH

3.3

0.3

1.5

3.5

6.2

1.5

6.5

for t

PZL

5.0

0.5

0.8

2.8

5.5

0.8

5.8

2 x V

PLZ

Output Disable Time

1.65

2.0

6.5

13.2

2.0

14.5

50 pF, RD

500

Ω

Figures

1, 3

PHZ

1.8

2.0

5.4

2.0

500

Ω

2.5

0.2

1.5

3.5

1.5

8.5

GND for t

PHZ

3.3

0.3

1.0

2.8

5.7

1.0

for t

PLZ

5.0

0.5

2.1

4.7

0.5

5.0

2 x V

Input Capacitance

OUT

Output Capacitance

Power Dissipation

3.3

(Note 3)

Figure 2

Capacitance

5.0

www.fairchildsemi.com

NC7SZ125

Tape and Reel Specification

TAPE FORMAT

TAPE DIMENSIONS inches (millimeters)

Package

Tape

Number

Cavity

Cover Tape

Designator

Section

Cavities

Status

Leader (Start End)

125 (typ)

Empty

Sealed

M5X, P5X

Carrier

3000

Filled

Sealed

Trailer (Hub End)

75 (typ)

Empty

Sealed

L6X

TBD

Package

Tape Size

DIM A

DIM B

DIM F

DIM K

DIM P1

DIM W

SC70-5

8 mm

0.093

0.096

0.138

0.004 0.053

0.004

0.157

0.315

0.004

(2.35)

(2.45)

(3.5

0.10)

(1.35

0.10)

(4)

0.1)

SOT23-5

8 mm

0.130

0.138

0.002 0.055

0.004

0.157

0.315

0.012

(3.3)

(3.5

0.05)

(1.4

0.11)

(4)

0.3)

MicroPak

TBD

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NC7SZ125 T

inyLogi



UHS B

er w

ith 3-

E O

tput

Physical Dimensions

inches (millimeters) unless otherwise noted (Continued)

6-Lead, MicroPak, Ceramic, 1.0mm Wide

Package Number MAC06A

Preliminary

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

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