Power-Distribution Switches

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

33-m

Ω

(5-V Input) High-Side MOSFET

Switch

Short-Circuit and Thermal Protection

Overcurrent Logic Output

Operating Range . . . 2.7 V to 5.5 V

Logic-Level Enable Input

Typical Rise Time . . . 6.1 ms

Undervoltage Lockout

Maximum Standby Supply

Current . . . 10

No Drain-Source Back-Gate Diode

Available in 8-pin SOIC and PDIP Packages

Ambient Temperature Range, – 40

C to 85

2-kV Human-Body-Model, 200-V

Machine-Model ESD Protection

description

The TPS202x family of power distribution switches is intended for applications where heavy capacitive loads

and short circuits are likely to be encountered. These devices are 50-m

Ω

N-channel MOSFET high-side power

switches. The switch is controlled by a logic enable compatible with 5-V logic and 3-V logic. Gate drive is

provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize

current surges during switching. The charge pump requires no external components and allows operation from

supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the TPS202x limits the output

current to a safe level by switching into a constant-current mode, pulling the overcurrent (OC) logic output low.

When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the

junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from

a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch

remains off until valid input voltage is present.

The TPS202x devices differ only in short-circuit current threshold. The TPS2020 limits at 0.3-A load, the

TPS2021 at 0.9-A load, the TPS2022 at 1.5-A load, the TPS2023 at 2.2-A load, and the TPS2024 at 3-A load

(see Available Options). The TPS202x is available in an 8-pin small-outline integrated-circuit (SOIC) package

and in an 8-pin dual-in-line (DIP) package and operates over a junction temperature range of – 40

C to 125

TPS201xA

TPS202x

TPS203x

33 m

Ω

, single

0.2 A – 2 A

0.2 A – 2 A

0.2 A – 2 A

TPS2014

TPS2015

TPS2041

TPS2051

TPS2045

TPS2055

80 m

Ω

, single

600 mA

1 A

500 mA

250 mA

GENERAL SWITCH CATALOG

TPS2042

TPS2052

TPS2046

TPS2056

80 m

Ω

, dual

500 mA

250 mA

TPS2100/1

260 m

Ω

IN1 500 mA

IN2 10 mA

OUT

IN1

IN2

TPS2102/3/4/5

IN1 500 mA

IN2 100 mA

1.3

Ω

TPS2043

TPS2053

TPS2047

TPS2057

80 m

Ω

, triple

500 mA

250 mA

TPS2044

TPS2054

TPS2048

TPS2058

80 m

Ω

, quad

500 mA

250 mA

1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

OUT

D OR P PACKAGE

(TOP VIEW)

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

AVAILABLE OPTIONS

RECOMMENDED

MAXIMUM CONTINUOUS

TYPICAL SHORT-CIRCUIT

PACKAGED DEVICES

ENABLE

MAXIMUM CONTINUOUS

LOAD CURRENT

(A)

CURRENT LIMIT AT 25

(A)

SMALL OUTLINE

(D)†

PLASTIC DIP

(P)

0.2

0.3

TPS2020D

TPS2020P

0.6

0.9

TPS2021D

TPS2021P

– 40

C to 85

Active low

1.5

TPS2022D

TPS2022P

1.5

2.2

TPS2023D

TPS2023P

TPS2024D

TPS2024P

† The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2020DR)

TPS2020 functional block diagram

OUT

GND

Current

Limit

Driver

UVLO

Charge

Pump

Thermal

Sense

Power Switch

†

†Current Sense

Terminal Functions

TERMINAL

NAME

NO.

D OR P

I/O

DESCRIPTION

Enable input. Logic low turns on power switch.

GND

Ground

2, 3

Input voltage

Overcurrent. Logic output active low

OUT

6, 7, 8

Power-switch output

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

detailed description

power switch

The power switch is an N-channel MOSFET with a maximum on-state resistance of 50 m

Ω

I(IN)

= 5 V).

Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when

disabled.

charge pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate

of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires

very little supply current.

driver

The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated

electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and

fall times of the output voltage. The rise and fall times are typically in the 2-ms to 9-ms range.

enable ( EN )

The logic enable disables the power switch, the bias for the charge pump, driver, and other circuitry to reduce

the supply current to less than 10

A when a logic high is present on EN . A logic zero input on EN restores bias

to the drive and control circuits and turns the power on. The enable input is compatible with both TTL and CMOS

logic levels.

overcurrent ( OC )

The OC open drain output is asserted (active low) when an overcurrent or overtemperature condition is

encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.

current sense

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than

conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry

sends a control signal to the driver. The driver, in turn, reduces the gate voltage and drives the power FET into

its saturation region, which switches the output into a constant current mode and holds the current constant

while varying the voltage on the load.

thermal sense

An internal thermal-sense circuit shuts off the power switch when the junction temperature rises to

approximately 140

C. Hysteresis is built into the thermal sense circuit. After the device has cooled

approximately 20

C, the switch turns back on. The switch continues to cycle off and on until the fault is removed.

undervoltage lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control

signal turns off the power switch.

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Input voltage range, V

I(IN)

(see Note 1)

– 0.3 V to 6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, V

O(OUT)

(see Note 1)

– 0.3 V to V

I(IN)

+ 0.3 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

I(EN)

– 0.3 V to 6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

O(OUT)

internally limited

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation

See Dissipation Rating Table

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T

– 40

C to 125

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

– 65

C to 150

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds

260

. . . . . . . . . . . . . . . . . . . . . . .

Electrostatic discharge (ESD) protection: Human body model

2 kV

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Machine model

200V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Charged device model (CDM)

750 V

. . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

DISSIPATION RATING TABLE

PACKAGE

≤

POWER RATING

DERATING FACTOR

ABOVE TA = 25

TA = 70

POWER RATING

TA = 85

POWER RATING

725 mW

5.8 mW/

464 mW

377 mW

1175 mW

9.4 mW/

752 mW

611 mW

recommended operating conditions

MIN

MAX

UNIT

Input voltage

VI(IN)

2.7

5.5

Input voltage

VI(EN)

5.5

TPS2020

0.2

TPS2021

0.6

Continuous output current, IO

TPS2022

TPS2023

1.5

TPS2024

Operating virtual junction temperature, TJ

– 40

125

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

electrical characteristics over recommended operating junction temperature range, V

I(IN)

= 5.5 V,

= rated current, EN = 0 V (unless otherwise noted)

power switch

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

UNIT

VI(IN) = 5 V,

TJ = 25

IO = 1.8 A

VI(IN) = 5 V,

TJ = 85

IO = 1.8 A

VI(IN) = 5 V,

TJ = 125

IO = 1.8 A

VI(IN) = 3.3 V,

TJ = 25

IO = 1.8 A

VI(IN) = 3.3 V,

TJ = 85

IO = 1.8 A

rDS(on)

Static drain-source on-state resistance

VI(IN) = 3.3 V,

TJ = 125

IO = 1.8 A

Ω

rDS(on)

Static drain-source on-state resistance

VI(IN) = 5 V,

TJ = 25

IO = 0.18 A

Ω

VI(IN) = 5 V,

TJ = 85

IO = 0.18 A

VI(IN) = 5 V,

TJ = 125

IO = 0.18 A

VI(IN) = 3.3 V,

TJ = 25

IO = 0.18 A

VI(IN) = 3.3 V,

TJ = 85

IO = 0.18 A

VI(IN) = 3.3 V,

TJ = 125

IO = 0.18 A

Rise time output

VI(IN) = 5.5 V,

CL = 1

TJ = 25

RL = 10

Ω

6.1

Rise time, output

VI(IN) = 2.7 V,

CL = 1

TJ = 25

RL = 10

Ω

8.6

Fall time output

VI(IN) = 5.5 V,

CL = 1

TJ = 25

RL = 10

Ω

3.4

Fall time, output

VI(IN) = 2.7 V,

CL = 1

TJ = 25

RL = 10

Ω

† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

enable input ( EN )

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIH

High-level input voltage

2.7 V

≤

VI(IN)

≤

5.5 V

VIL

Low-level input voltage

4.5 V

≤

VI(IN)

≤

5.5 V

0.8

VIL

Low-level in ut voltage

2.7 V

≤

VI(IN)

≤

4.5 V

0.5

Input current

EN= 0 V or EN = VI(IN)

– 0.5

0.5

ton

Turnon time

CL = 100

F, RL = 10

Ω

toff

Turnoff time

CL = 100

F, RL = 10

Ω

current limit

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

UNIT

TPS2020

0.22

0.3

0.4

TJ = 25

C, VI = 5.5 V,

TPS2021

0.66

0.9

1.1

IOS

Short-circuit output current

TJ = 25 C, VI = 5.5 V,

OUT connected to GND,

TPS2022

1.1

1.5

1.8

Device enable into short circuit

TPS2023

1.65

2.2

2.7

TPS2024

2.2

3.8

† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

electrical characteristics over recommended operating junction temperature range, V

I(IN)

= 5.5 V,

= rated current, EN = 0 V (unless otherwise noted) (continued)

supply current

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Supply current low level output

No Load on OUT

TJ = 25

0.3

Supply current, low-level output

No Load on OUT

EN = VI(IN)

– 40

≤

125

Supply current high level output

No Load on OUT

0 V

TJ = 25

Supply current, high-level output

No Load on OUT

EN = 0 V

– 40

≤

125

100

Leakage current

OUT connected to ground

EN = VI(IN)

– 40

≤

125

undervoltage lockout

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Low-level input voltage

2.5

Hysteresis

TJ = 25

100

overcurrent (OC)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output low voltage

IO = 10 mA, VOL(OC)

0.4

Off-state current†

VO = 5 V, VO = 3.3 V

† Specified by design, not production tested.

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

OUT

90%

10%

50%

90%

10%

VO(OUT)

VI(EN)

VO(OUT)

VOLTAGE WAVEFORMS

TEST CIRCUIT

ton

toff

Figure 1. Test Circuit and Voltage Waveforms

Table of Timing Diagrams

FIGURE

Turnon Delay and Rise TIme

Turnoff Delay and Fall Time

Turnon Delay and Rise TIme with 1-

F Load

Turnoff Delay and Rise TIme with 1-

F Load

Device Enabled into Short

TPS2020, TPS2021, TPS2022, TPS2023, and TPS2024, Ramped Load on Enabled Device

7, 8, 9,

10, 11

TPS2024, Inrush Current

7.9-

Ω

Load Connected to an Enabled TPS2020 Device

3.7-

Ω

Load Connected to an Enabled TPS2020 Device

3.7-

Ω

Load Connected to an Enabled TPS2021 Device

2.6-

Ω

Load Connected to an Enabled TPS2021 Device

2.6-

Ω

Load Connected to an Enabled TPS2022 Device

1.2-

Ω

Load Connected to an Enabled TPS2022 Device

1.2-

Ω

Load Connected to an Enabled TPS2023 Device

0.9-

Ω

Load Connected to an Enabled TPS2023 Device

0.9-

Ω

Load Connected to an Enabled TPS2024 Device

0.5-

Ω

Load Connected to an Enabled TPS2024 Device

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

Figure 2. Turnon Delay and Rise Time

t – Time – ms

VIN = 5 V

RL = 27

Ω

TA = 25

VO(OUT) (2 V/div)

VI(EN)

VO(OUT)

VI(EN) (5 V/div)

Figure 3. Turnoff Delay and Fall Time

t – Time – ms

VI(EN) (5 V/div)

VI(IN) = 5 V

RL = 27

Ω

TA = 25

VO(OUT) (2 V/div)

VI(EN)

VO(OUT)

Figure 4. Turnon Delay and Rise Time

With 1-

F Load

t – Time – ms

VI(EN) (5 V/div)

VI(IN) = 5 V

CL = 1

RL = 27

Ω

TA = 25

VO(OUT) (2 V/div)

VI(EN)

VO(OUT)

Figure 5. Turnoff Delay and Fall Time

With 1-

F Load

t – Time – ms

VI(EN) (5 V/div)

VI(IN) = 5 V

CL = 1

RL = 27

Ω

TA = 25

VO(OUT) (2 V/div)

VI(EN)

VO(OUT)

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303

•

DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

Figure 6. Device Enabled Into Short

t – Time – ms

VI(EN) (5 V/div)

IO(OUT) (1 A/div)

VI(EN)

IO(OUT)

VI(IN) = 5 V

TA = 25

TPS2024

TPS2023

TPS2022

TPS2021

TPS2020

Figure 7. TPS2020, Ramped Load on

Enabled Device

80 100 120 140 160 180 200

t – Time – ms

VO(OC) (5 V/div)

IO(OUT) (500 mA/div)

VO(OC)

IO(OUT)

VI(IN) = 5 V

TA = 25

Figure 8. TPS2021, Ramped Load on Enabled

Device

80 100 120 140 160 180 200

t – Time – ms

VO(OC) (5 V/div)

IO(OUT) (1 A/div)

VO(OC)

IO(OUT)

VI(IN) = 5 V

TA = 25

Figure 9. TPS2022, Ramped Load on

Enabled Device

80 100 120 140 160 180 200

t – Time – ms

VO(OC) (5 V/div)

IO(OUT) (1 A/div)

VO(OC)

IO(OUT)

VI(IN) = 5 V

TA = 25