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November 1994

INTEL CORPORATION 1995

Order Number 272356-003

8XL51FA FB FC

LOW VOLTAGE

CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS

Commercial Express

87L51FA 83L51FA 80L51FA 87L51FB 83L51FB 87L51FC 83L51FC

High Performance CHMOS OTP ROM

ROM CPU

Low Voltage Operation

20 MHz Commercial 16 MHz Express

Operation

Three 16-Bit Timer Counters

Programmable Counter Array with

High Speed Output

Compare Capture

Pulse Width Modulator

Watchdog Timer Capabilities

Up Down Timer Counter

Three Level Program Lock System

8K 16K 32K On-Chip Program Memory

256 Bytes of On-Chip Data RAM

Improved Quick Pulse Programming

Algorithm

Boolean Processor

32 Programmable I O Lines

7 Interrupt Sources

Four Level Interrupt Priority

Programmable Serial Channel with

Framing Error Detection

Automatic Address Recognition

64K External Program Memory Space

64K External Data Memory Space

MCS

51 Microcontroller Compatible

Instruction Set

Power Saving Idle and Power Down

Modes

ONCE (On-Circuit Emulation) Mode

Extended Temperature Range

(

40 C to

85 C)

MEMORY ORGANIZATION

Device

ROM

OTP ROM

Version

ROMLESS

Version

ROM

Bytes

RAM

OTP ROM

Bytes

83L51FA

87L51FA

80L51FA

256

83L51FB

87L51FB

80L51FA

16K

256

83L51FC

87L51FC

80L51FA

32K

256

These devices can address up to 64 Kbytes of external program data memory

The Intel 8XL51FA 8XL51FB 8XL51FC is a single-chip control oriented microcontroller which is fabricated on

Intel’s reliable CHMOS III-E technology Being a member of the MCS

51 microcontroller family the

8XL51FA 8XL51FB 8XL51FC uses the same powerful instruction set has the same architecture and is pin-

for-pin compatible with the existing MCS 51 microcontroller products

The 8XL51FX is a 3V version of current 8XC51FX and will operate from 2 7V to 3 6V at a frequency range of

3 5 MHz to 16 MHz (Express) 20 MHz (Commercial)

For the remainder of this document the 8XL51FA 8XL51FB 8XL51FC will be referred to as the 8XL51FX

unless information applies to a specific device

8XL51FA FB FC

PIN DESCRIPTIONS

Supply voltage

Circuit ground

Port 0 Port 0 is an 8-bit open drain bidirectional I O

port As an output port each pin can sink several

inputs Port 0 pins that have 1’s written to them float

and in that state can be used as high-impedance

inputs

Port 0 is also the multiplexed low-order address and

data bus during accesses to external Program and

Data Memory In this application it uses strong inter-

nal pullups when emitting 1’s and can source and

sink several inputs

Port 0 also receives the code bytes during OTP

ROM programming and outputs the code bytes dur-

ing program verification External pullup resistors are

required during program verification

Port 1 Port 1 is an 8-bit bidirectional I O port with

internal pullups The Port 1 output buffers can drive

several inputs Port 1 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 1

pins that are externally pulled low will source current

on the data sheet) because of the internal pull-

ups

In addition Port 1 serves the functions of the follow-

ing special features of the 8XL51FX

Port Pin

Alternate Function

P1 0

T2 (External Count Input to Timer

Counter 2) Clock Out

P1 1

T2EX (Timer Counter 2 Capture

Reload Trigger and Direction Control)

P1 2

ECI (External Count Input to the PCA)

P1 3

CEX0 (External I O for Compare

Capture Module 0)

P1 4

CEX1 (External I O for Compare

Capture Module 1)

P1 5

CEX2 (External I O for Compare

Capture Module 2)

P1 6

CEX3 (External I O for Compare

Capture Module 3)

P1 7

CEX4 (External I O for Compare

Capture Module 4)

Port 1 receives the low-order address bytes during

OTP ROM programming and verifying

Port 2 Port 2 is an 8-bit bidirectional I O port with

internal pullups The Port 2 output buffers can drive

several inputs Port 2 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 2

pins that are externally pulled low will source current

on the data sheet) because of the internal pull-

ups

Port 2 emits the high-order address byte during

fetches from external Program Memory and during

accesses to external Data Memory that use 16-bit

addresses (MOVX

DPTR) In this application it

uses strong internal pullups when emitting 1’s Dur-

ing accesses to external Data Memory that use 8-bit

addresses (MOVX

Ri) Port 2 emits the contents of

the P2 Special Function Register

Some Port 2 pins receive the high-order address bits

during OTP ROM programming and program verifi-

cation

Port 3 Port 3 is an 8-bit bidirectional I O port with

internal pullups The Port 3 output buffers can drive

several inputs Port 3 pins that have 1’s written to

them are pulled high by the internal pullups and in

that state can be used as inputs As inputs Port 3

pins that are externally pulled low will source current

on the data sheet) because of the pullups

Port 3 also serves the functions of various special

features of the MCS 51 microcontroller family as

listed below

Port Pin

Alternate Function

P3 0

RXD (serial input port)

P3 1

TXD (serial output port)

P3 2

INT0 (external interrupt 0)

P3 3

INT1 (external interrupt 1)

P3 4

T0 (Timer 0 external input)

P3 5

T1 (Timer 1 external input)

P3 6

WR (external data memory write strobe)

P3 7

RD (external data memory read strobe)

RST Reset input A high on this pin for two machine

cycles while the oscillator is running resets the de-

vice The port pins will be driven to their reset condi-

tion when a minimum V

IH2

voltage is applied wheth-

er the oscillator is running or not An internal pull-

down resistor permits a power-on reset with only a

capacitor connected to V

8XL51FA FB FC

ALE Address Latch Enable output pulse for latching

the low byte of the address during accesses to ex-

ternal memory This pin (ALE PROG) is also the

program pulse input during OTP ROM programming

for the 87L51FX

In normal operation ALE is emitted at a constant

rate of

the oscillator frequency and may be used

for external timing or clocking purposes Note how-

ever that one ALE pulse is skipped during each ac-

cess to external Data Memory

If desired ALE operation can be disabled by setting

bit 0 of SFR location 8EH With this bit set the pin is

weakly pulled high However the ALE disable fea-

ture will be suspended during a MOVX or MOVC in-

struction idle mode power down mode and ICE

mode The ALE disable feature will be terminated by

reset When the ALE disable feature is suspended or

terminated the ALE pin will no longer be pulled up

weakly Setting the ALE-disable bit has no affect if

the microcontroller is in external execution mode

Throughout the remainder of this data sheet ALE

will refer to the signal coming out of the ALE PROG

pin and the pin will be referred to as the ALE PROG

PSEN Program Store Enable is the read strobe to

external Program Memory

When the 8XL51FX is executing code from external

Program Memory PSEN is activated twice each ma-

chine cycle except that two PSEN activations are

skipped during each access to external Data Memo-

EA V

External Access enable

EA must be

strapped to VSS in order to enable the device to

fetch code from external Program Memory locations

0000H to 0FFFH Note however that if either of the

Program Lock bits are programmed EA will be inter-

nally latched on reset

EA must be strapped to V

for internal program

executions

This pin also receives the programming supply volt-

age (V

) during OTP ROM programming

XTAL1 Input to the inverting oscillator amplifier

XTAL2 Output from the inverting oscillator amplifier

OSCILLATOR CHARACTERISTICS

XTAL1 and XTAL2 are the input and output respec-

tively of a inverting amplifier which can be config-

ured for use as an on-chip oscillator as shown in

Figure 3 Either a quartz crystal or ceramic resonator

may be used More detailed information concerning

the use of the on-chip oscillator is available in Appli-

cation Note AP-155 ‘‘Oscillators for Microcontrol-

lers ’’

To drive the device from an external clock source

XTAL1 should be driven while XTAL2 floats as

shown in Figure 4 There are no requirements on the

duty cycle of the external clock signal since the in-

put to the internal clocking circuitry is through a di-

vide-by-two flip-flop but minimum and maximum

high and low times specified on the data sheet must

be observed

An external oscillator may encounter as much as a

100 pF load at XTAL1 when it starts up This is due

to interaction between the amplifier and its feedback

capacitance Once the external signal meets the V

and V

specifications the capacitance will not ex-

ceed 20 pF

272356 – 4

C1 C2 e 30 pF

10 pF for Crystals

For Ceramic Resonators contact resonator manufacturer

Figure 3 Oscillator Connections

272356 – 5

Figure 4 External Clock Drive Configuration

IDLE MODE

The user’s software can invoke the Idle Mode When

the microcontroller is in this mode power consump-

tion is reduced The Special Function Registers and

the onboard RAM retain their values during Idle but

the processor stops executing instructions

Idle

Mode will be exited if the chip is reset or if an en-

abled interrupt occurs The PCA timer counter can

optionally be left running or paused during Idle

Mode

8XL51FA FB FC

POWER DOWN MODE

To save even more power a Power Down mode can

be invoked by software In this mode the oscillator

is stopped and the instruction that invoked Power

Down is the last instruction executed The on-chip

RAM and Special Function Registers retain their val-

ues until the Power Down mode is terminated

On the 8XL51FX either hardware reset or external

interrupt can cause an exit from Power Down Reset

redefines all the SFRs but does not change the on-

chip RAM An external interrupt allows both the

SFRs and the on-chip RAM to retain their values

To properly terminate Power Down the reset or ex-

ternal interrupt should not be executed before V

restored to its normal operating level and must be

held active long enough for the oscillator to restart

and stabilize (normally less than 10 ms)

With an external interrupt INT0 or INT1 must be en-

abled and configured as level-sensitive Holding the

pin low restarts the oscillator but bringing the pin

back high completes the exit Once the interrupt is

serviced the next instruction to be executed after

RETI will be the one following the instruction that put

the device into Power Down

DESIGN CONSIDERATION

The 8XL51FX will operate from 2 7V to 3 6V with

a frequency range of 3 5 MHz to 16 MHz (Ex-

press) 20 MHz (Commercial) Operating beyond

these specifications could cause improper device

functionality

All V

and V

pins must be connected Please

refer to Figure 2 Pin Connections for the specific

pins

When the idle mode is terminated by a hardware

reset the device normally resumes program exe-

cution from where it left off up to two machine

cycles before the internal reset algorithm takes

control On-chip hardware inhibits access to inter-

nal RAM in this event but access to the port pins

is not inhibited To eliminate the possibility of an

unexpected write when Idle is terminated by re-

set the instruction following the one that invokes

Idle should not be one that writes to a port pin or

to external memory

ONCE MODE

The ONCE (‘‘On-Circuit Emulation’’) Mode facilitates

testing

and

debugging

systems

using

the

8XL51FX without the 8XL51FX having to be re-

moved from the circuit The ONCE Mode is invoked

1) Pull ALE low while the device is in reset and

PSEN is high

2) Hold ALE low as RST is deactivated

While the device is in ONCE Mode the Port 0 pins

float and the other port pins and ALE and PSEN are

weakly pulled high The oscillator circuit remains ac-

tive While the 8XL51FX is in this mode an emulator

or test CPU can be used to drive the circuit Normal

operation is restored when a normal reset is applied

Table 1 Status of the External Pins during Idle and Power Down

Mode

Program

ALE

PSEN

PORT0

PORT1

PORT2

PORT3

Memory

Idle

Internal

Data

Idle

External

Float

Data

Address

Data

Power Down

Internal

Data

Power Down

External

Float

Data

NOTE

For more detailed information on the reduced power modes refer to current Embedded Microcontrollers and Processors

Handbook Volume I

270646 and Application Note AP-252 (Embedded Applications Handbook)

270648 ‘‘Designing

with the 80C51BH ’’

8XL51FA FB FC

8XL51FX EXPRESS

The Intel EXPRESS system offers enhancements to

the operational specifications of the MCS-51 family

of microcontrollers These EXPRESS products are

designed to meet the needs of those applications

whose operating requirements exceed commercial

standards

The EXPRESS program includes the commercial

standard temperature range with burn-in and an ex-

tended temperature range with or without burn-in

With the commercial standard temperature range

operational characteristics are guaranteed over the

temperature range of 0 C to 70 C With the extend-

ed temperature range option operational character-

istics are guaranteed over the range of b40 C to

85 C

Package types and EXPRESS versions are identified

by a one- or two-letter prefix to the part number The

prefixes are listed in Table 2

For the extended temperature range option this

data sheet specifies the parameters which deviate

from their commercial temperature range limits

Table 2 Prefix Identification

Prefix

Package

Temperature

Type

Range

PLCC

Commercial

QFP

Commercial

PLCC

Extended

QFP

Extended

NOTE

Contact your distributor or local sales office to match the

EXPRESS prefix with the proper device

EXAMPLES

N87L51FC indicates 87L51FC in a PLCC package and

specified for commercial temperature range without burn-

TN87L51FC indicates 87L51FC in a PLCC package

and specified for extended temperature range with

burn-in

8XL51FA FB FC

ABSOLUTE MAXIMUM RATINGS

Ambient Temperature Under Bias b40 C to a85 C

Storage Temperature

65 C to a150 C

Voltage on EA V

Pin to V

0V to a13 0V

Voltage on Any Other Pin to V

0 5V to a6 5V

per I O Pin

15 mA

Power Dissipation

1 5W

(based on PACKAGE heat transfer limitations not

device power consumption)

NOTICE This data sheet contains information on

products in the sampling and initial production phases

of development It is valid for the devices indicated in

the revision history The specifications are subject to

change without notice

WARNING Stressing the device beyond the ‘‘Absolute

Maximum Ratings’’ may cause permanent damage

These are stress ratings only Operation beyond the

‘‘Operating Conditions’’ is not recommended and ex-

tended exposure beyond the ‘‘Operating Conditions’’

may affect device reliability

OPERATING CONDITIONS

Symbol

Description

Min

Max

Units

Ambient Temperature Under Bias

Commercial

Express

Supply Voltage

2 7

3 6

DC CHARACTERISTICS

(Over Operating Conditions)

All parameter values apply to all devices unless otherwise indicated

Symbol

Parameter

Min

Max

Units

Test Conditions

Input Low Voltage

0 5

0 8

(except XTAL1 RST)

IL1

Input Low Voltage

0 5

0 2 V

0 1

(XTAL1 RST)

Input High Voltage

2 0

0 5

(Except XTAL1 RST EA)

IH1

Input High Voltage (EA)

1 0

0 5

IH2

Input High Voltage

0 7 V

0 5

(XTAL1 RST)

Output Low Voltage (Note 4)

0 4

1 6 mA (Note 1)

(Ports 1 2 and 3)

OL1

Output Low Voltage (Note 4)

0 4

3 2 mA

(Port 0 ALE PSEN)

(Note 1)

Output High Voltage

0 7

e b

30 mA

(Ports 1 2 and 3 ALE PSEN

(Note 2)

OH1

Output High Voltage

2 4

e b

1 0 mA

(Port 0 in External Bus Mode)

(Note 2)

Logical 0 Input Current

0 4V

(Ports 1 2 and 3)

Input Leakage Current (Port 0)

8XL51FA FB FC

DC CHARACTERISTICS

(Over Operating Conditions)

All parameter values apply to all devices unless otherwise indicated (Continued)

Symbol

Parameter

Min

Max

Units

Test Conditions

Logical 1 to 0

350

1 4V

Transition Current

(Ports 1 2 and 3)

RRST

RST Pulldown Resistor

225

Power Supply Current

(Note 3)

Active Mode at 16 MHz

Idle Mode at 16 MHz

Power-Down Mode

NOTES

1 Capacitive loading on Ports 0 and 2 may cause noise pulses above 0 4V to be superimposed on the V

s of ALE and

Ports 1 2 and 3 The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins

change from 1 to 0 In applications where capacitance loading exceeds 100 pF the noise pulses on these signals may

exceed 0 8V It may be desirable to qualify ALE or other signals with a Schmitt Trigger or CMOS-level input logic

2 Capacitive loading on Ports 0 and 2 cause the V

on ALE and PSEN to drop below the 0 9 V

specification when the

address lines are stabilizing

3 See Figures 6 – 9 for test conditions Minimum V

for power down is 2V

4 Under steady state (non-transient) conditions I

must be externally limited as follows

Maximum I

per port pin

10 mA

Maximum I

per 8-bit port -

Port 0

26 mA

Ports 1 2 and 3

15 mA

Maximum total I

for all output pins

71 mA

If I

exceeds the test condition V

may exceed the related specification Pins are not guaranteed to sink current greater

than the listed test conditions

Running the device with EA at a higher voltage than V

sinks additional currrent

272356 – 6

Max at other frequencies (3 5 MHz to 20 MHz) is given by

Active Mode

MAX e 1 1

FREQ a 7 6

Idle Mode

MAX e 0 4

FREQ a 1 8

Where FREQ is in MHz I

MAX is given in mA

Figure 5 I

vs Frequency

8XL51FA FB FC

EXPLANATION OF THE AC SYMBOLS

Each timing symbol has 5 characters The first char-

acter is always a ‘T’ (stands for time) The other

characters depending on their positions stand for

the name of a signal or the logical status of that

signal The following is a list of all the characters and

what they stand for

A Address

C Clock

D Input Data

H Logic level HIGH

I Instruction (program memory contents)

L Logic level LOW or ALE

P PSEN

Q Output Data

R RD signal

T Time

V Valid

W WR signal

X No longer a valid logic level

Z Float

For example

TAVLL e Time from Address Valid to ALE Low

TLLPL e Time from ALE Low to PSEN Low

AC CHARACTERISTICS

(Over Operating Conditions Load Capacitance for Port 0 ALE PROG and

PSEN e 100 pF Load Capacitance for All Other Outputs e 80 pF)

EXTERNAL MEMORY CHARACTERISTICS

All parameter values apply to all devices unless otherwise indicated In this table 8XL51FX refers to 8XL51FX

and 8XL51FX-1

Symbol

Parameter

12 MHz

20 MHz

Variable

Units

Oscillator

Min

Max

Min

Max

Min

Max

1 TCLCL

Oscillator Frequency

8XL51FX

3 5

MHz

8XL51FX-1

3 5

MHz

8XL51FX-20

3 5

MHz

TLHLL

ALE Pulse Width

127

2 TCLCL b 40

TAVLL

Address Valid to

TCLCL b 40

ALE Low

TLLAX

Address Hold After

TCLCL b 30

ALE Low

TLLIV

ALE Low to Valid

Instruction In

8XL51FX

234

4 TCLCL b 100

8XL51FX-20

125

4 TCLCL b 75

TLLPL

ALE Low to PSEN

TCLCL b 30

Low

TPLPH

PSEN Pulse Width

205

105

3 TCLCL b 45

TPLIV

PSEN Low to Valid

Instruction In

8XL51FX

145

3 TCLCL b 105

8XL51FX-20

3 TCLCL b 90

TPXIX

Input Instruction

Hold After PSEN

8XL51FA FB FC

EXTERNAL MEMORY CHARACTERISTICS

(Continued)

All parameter values apply to all devices unless otherwise indicated

Symbol

Parameter

12 MHz

20 MHz

Variable

Units

Oscillator

Min

Max

Min

Max

Min

Max

TPXIZ

Input Instruction Float

After PSEN

8XL51FX

TCLCL

8XL51FX-20

TCLCL

TAVIV

Address to Valid

312

145

5 TCLCL

105

Instruction In

TPLAZ

PSEN Low to Address

Float

TRLRH

RD Pulse Width

400

200

6 TCLCL

100

TWLWH

WR Pulse Width

400

200

6 TCLCL

100

TRLDV

RD Low to Valid Data In

8XL51FX

252

5 TCLCL

165

8XL51FX-20

155

5 TCLCL

TRHDX

Data Hold After RD

TRHDZ

Data Float After RD

107

2 TCLCL

TLLDV

ALE Low to Valid Data In

8XL51FX

517

8 TCLCL

150

8XL51FX-20

310

8 TCLCL