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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
1
REV 2
©
Motorola, Inc. 1995
12/95
Low-Voltage Quiet CMOS
Octal Buffer
(3-State, Non-Inverting)
The MC74LVQ244 is a high performance, non–inverting octal buffer
operating from a 2.7 to 3.6V supply. The MC74LVQ244 is suitable for
memory address driving and all TTL level bus oriented transceiver
applications.
Current drive capability is 12mA at the outputs. The Output Enable
(OE) input, when HIGH, disables the output by placing them in a HIGH Z
condition.
Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low
Noise Applications
Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
Guaranteed Skew Specifications
Guaranteed Incident Wave Switching into 75
Low Static Supply Current (10
µ
A) Substantially Reduces System Power
Requirements
Latchup Performance Exceeds 500mA
ESD Performance: Human Body Model >2000V
Pinout: 20–Lead (Top View)
19
20
18
17
16
15
14
2
1
3
4
5
6
7
VCC
13
8
12
9
11
10
2OE
1O0
2D0
1O1
2D1
1O2
2D2
1O3
2D3
1OE
1D0
2O0
1D1
2O1
1D2
2O2
1D3
2O3
GND
PIN NAMES
Function
Output Enable Inputs
Data Inputs
3–State Outputs
Pins
nOE
1Dn, 2Dn
1On, 2On
MC74LVQ244
LOW–VOLTAGE CMOS
OCTAL BUFFER
LVQ
DW SUFFIX
PLASTIC SOIC
CASE 751D–04
DT SUFFIX
PLASTIC TSSOP
CASE 948E–02
20
1
20
1
M SUFFIX
PLASTIC SOIC EIAJ
CASE 967–01
20
1
SD SUFFIX
PLASTIC SSOP
CASE 940C–03
20
1
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MC74LVQ244
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
2
LOGIC DIAGRAM
1OE
1
1D0
2
1O0
18
1D1
4
1O1
16
1D2
6
1O2
14
1D3
8
1O3
12
2OE
19
2D0
17
2O0
3
2D1
15
2O1
5
2D2
13
2O2
7
2D3
11
2O3
9
INPUTS
OUTPUTS
1OE
2OE
1Dn
2Dn
1On, 2On
L
L
L
L
H
H
H
X
Z
H = High Voltage Level; L = Low Voltage Level; Z = High
Impedance State; X = High or Low Voltage Level and Transitions
Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs
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MC74LVQ244
ECLinPS and ECLinPS Lite
DL140 — Rev 3
3
MOTOROLA
ABSOLUTE MAXIMUM RATINGS*
Symbol
Parameter
Value
Condition
Unit
VCC
DC Supply Voltage
–0.5 to +7.0
V
VI
DC Input Voltage
–0.5
VI
VCC + 0.5V
V
VO
DC Output Voltage
–0.5
VO
VCC + 0.5
Output in HIGH or LOW State
V
IIK
DC Input Diode Current
–20
VI = –0.5V
mA
+20
VI = VCC + 0.5V
mA
IOK
DC Output Diode Current
–20
VO = –0.5V
mA
+20
VI = VCC + 0.5V
mA
IO
DC Output Source/Sink Current
±
50
mA
ICC
DC Supply Current
±
400
mA
IGND
DC Ground Current
±
400
mA
TSTG
Storage Temperature Range
–65 to +150
°
C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
2.0
3.3
3.6
V
VI
Input Voltage
0
VCC
V
VO
Output Voltage
0
VCC
V
TA
Operating Free–Air Temperature
–40
+85
°
C
V/
t
Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V
0
125
mV/ns
DC ELECTRICAL CHARACTERISTICS
TA = –40
°
C to +85
°
C
Symbol
Characteristic
Condition
Min
Max
Unit
VIH
HIGH Level Input Voltage (Note 1)
2.7V
VCC
3.6V,
VO = 0.1V or VCC – 0.1V
2.0
V
VIL
LOW Level Input Voltage (Note 1)
2.7V
VCC
3.6V,
VO = 0.1V or VCC – 0.1V
0.8
V
VOH
HIGH Level Output Voltage
2.7V
VCC
3.6V; IOH = –50
µ
A
VCC – 0.1
V
VCC = 2.7V; IOH = –12mA
2.2
VCC = 3.0V; IOH = –12mA
2.48
VOL
LOW Level Output Voltage
2.7V
VCC
3.6V; IOL = 50
µ
A
0.1
V
2.7V
VCC
3.6V; IOL= 12mA
0.4
II
Input Leakage Current
2.7V
VCC
3.6V; VI= VCC, GND
±
1.0
µ
A
IOZ
Maximum 3–State Leakage Current
VI(OE) = VIL, VIH; VI, VO= VCC, GND
±
2.5
µ
A
IOLD
Minimum Dynamic Output Current (Note 2)
VCC = 3.6V; VOLD = 0.8V Max
36
mA
IOHD
VCC = 3.6V; VOHD = 2.0V Min
–25
mA
ICC
Quiescent Supply Current
2.7V
VCC
3.6V; VI = VCC, GND
10
µ
A
1. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH
2.4V, VIL
0.5V.
2. Incident wave switching on transmission lines with impedances as low as 75
for commercial temperature range is guaranteed. Maximum test
duration is 2ms, one output loaded at a time.
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MC74LVQ244
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
4
DYNAMIC SWITCHING CHARACTERISTICS (VCC = 3.3V)
TA = +25
°
C
Symbol
Characteristic
Condition
Min
Typ
Max
Unit
VOLP
Dynamic LOW Peak Voltage (Note 1)
CL = 50pF, VIH = 3.3V, VIL = 0V
0.6
1.0
V
VOLV
Dynamic LOW Valley Voltage (Note 1)
CL = 50pF, VIH = 3.3V, VIL = 0V
–0.5
–1.0
V
VIHD
High Level Dynamic Input Voltage
(Note 2)
Input–Under–Test Switching 0V to Threshold,
f=1MHz
1.5
2.0
V
VILD
Low Level Dynamic Input Voltage
(Note 2)
Input–Under–Test Switching 3.3V to Threshold,
f=1MHz
1.5
0.8
V
1. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW. The remaining output is measured in the
LOW state.
2. Number of data inputs is defined as “n” switching, “n–1” inputs switching 0V to 3.3V.
AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500
)
Limits
TA = +25
°
C
TA = –40
°
C to +85
°
C
VCC = 3.0V to 3.6V
VCC = 2.7V
VCC = 3.0V to 3.6V
VCC = 2.7V
Symbol
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Max
Max
Unit
tPLH
tPHL
Propagation Delay
Input to Output
2.0
2.0
7.0
7.0
9.0
9.0
2.0
2.0
7.5
7.5
11.0
11.0
2.0
2.0
9.5
9.5
11.5
11.5
ns
tPZH
tPZL
Output Enable Time
to High and Low Level
2.5
2.5
7.0
7.0
10.0
10.0
2.5
2.5
8.0
8.0
11.5
11.5
2.5
2.5
10.5
10.5
12.0
12.0
ns
tPHZ
tPLZ
Output Disable Time
From High and Low Level
1.0
1.0
6.5
6.5
9.5
9.5
1.0
1.0
7.5
7.5
11.0
11.0
1.0
1.0
10.0
10.0
11.5
11.5
ns
tOSHL
tOSLH
Output–to–Output Skew
(Note 1)
1.0
1.0
1.5
1.5
1.0
1.0
1.5
1.5
1.5
1.5
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
CPD
Power Dissipation Capacitance
10MHz, VCC = 3.3V, VI = 0V or VCC
22
pF
CIN
Input Capacitance
VCC = Open, VI = 0V or VCC
4.5
pF
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MC74LVQ244
ECLinPS and ECLinPS Lite
DL140 — Rev 3
5
MOTOROLA
WAVEFORM 1 – PROPAGATION DELAYS
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
VCC
0V
VOH
VOL
1Dn, 2Dn
1On, 2On
tPHL
tPLH
WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
VCC
0V
1OE, 2OE
1On, 2On
tPZH
tPHZ
tPZL
tPLZ
1On, 2On
50% VCC
50% VCC
50% VCC
50% VCC
50% VCC
50% VCC
Figure 1. AC Waveforms
50% VCC
VCC
VOH – 0.3V
VOL + 0.3V
GND
50% VCC
OPEN
PULSE
GENERATOR
RT
DUT
VCC
RL
R1
CL
2
VCC
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
2
VCC
Open Collector/Drain tPLH and tPHL
2
VCC
tPZH, tPHZ
Open
CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500
or equivalent
RT = ZOUT of pulse generator (typically 50
)
Figure 2. Test Circuit
background image
MC74LVQ244
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
6
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967–01
ISSUE O
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
K
M
P
R
0.510
0.299
0.104
0.019
0.035
0.012
0.009
7
°
0.415
0.029
0.499
0.292
0.093
0.014
0.020
0.010
0.004
0
°
0.395
0.010
12.95
7.60
2.65
0.49
0.90
0.32
0.25
7
°
10.55
0.75
12.65
7.40
2.35
0.35
0.50
0.25
0.10
0
°
10.05
0.25
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
1.27 BSC
0.050 BSC
–A
–B
P
10 PL
1
10
11
20
–T
D
20 PL
K
C
SEATING
PLANE
R
X 45
°
M
0.010 (0.25)
B
M
M
0.010 (0.25)
T
A
B
M
S
S
G
18 PL
F
J
DIM
MIN
MAX
MIN
MAX
INCHES
---
2.05
---
0.081
MILLIMETERS
0.05
0.20
0.002
0.008
0.35
0.50
0.014
0.020
0.18
0.27
0.007
0.011
12.35
12.80
0.486
0.504
5.10
5.45
0.201
0.215
1.27 BSC
0.050 BSC
7.40
8.20
0.291
0.323
0.50
0.85
0.020
0.033
1.10
1.50
0.043
0.059
0
0.70
0.90
0.028
0.035
---
0.81
---
0.032
A1
A
b
c
D
E
e
L
M
Z
HE
Q1
LE
_
10
_
0
_
10
_
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
Z
D
HE
E
1
20
11
10
b
A1
e
L
LE
Q1
M
_
VIEW P
DETAIL P
0.13 (0.005)
M
0.10 (0.004)
c
A
background image
MC74LVQ244
ECLinPS and ECLinPS Lite
DL140 — Rev 3
7
MOTOROLA
OUTLINE DIMENSIONS
SD SUFFIX
PLASTIC SSOP PACKAGE
CASE 940C–03
ISSUE B
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
DIM
A
MIN
MAX
MIN
MAX
INCHES
6.60
0.260
MILLIMETERS
B
4.30
4.50
0.169
0.177
C
1.20
0.047
D
0.05
0.15
0.002
0.006
F
0.50
0.75
0.020
0.030
G
0.65 BSC
0.026 BSC
H
0.27
0.37
0.011
0.015
J
0.09
0.20
0.004
0.008
J1
0.09
0.16
0.004
0.006
K
0.19
0.30
0.007
0.012
K1
0.19
0.25
0.007
0.010
L
6.40 BSC
0.252 BSC
M
0
8
0
8
_
_
_
_
NOTES:
6 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
7 CONTROLLING DIMENSION: MILLIMETER.
8 DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
9 DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
10 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
11 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
12 DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
1
10
11
20
PIN 1
IDENT
A
B
–T–
0.100 (0.004)
C
D
G
H
SECTION N–N
K
K1
J J1
N
N
M
F
–W–
SEATING
PLANE
–V–
–U–
S
U
M
0.10 (0.004)
V
S
T
20X REF
K
L
L/2
2X
S
U
0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40
0.252
–––
–––
S
U
0.15 (0.006) T
20
11
10
1
H
A
B
F
M
K
20X REF
S
U
M
0.12 (0.005)
V
S
T
L
L/2
PIN 1
IDENT
S
U
M
0.20 (0.008)
T
–V–
–U–
D
C
0.076 (0.003)
G
–T–
SEATING
PLANE
DETAIL E
N
N
0.25 (0.010)
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
K
J
J1
K1
SECTION N–N
DIM
A
MIN
MAX
MIN
MAX
INCHES
7.07
7.33
0.278
0.288
MILLIMETERS
B
5.20
5.38
0.205
0.212
C
1.73
1.99
0.068
0.078
D
0.05
0.21
0.002
0.008
F
0.63
0.95
0.024
0.037
G
0.65 BSC
0.026 BSC
H
0.59
0.75
0.023
0.030
J
0.09
0.20
0.003
0.008
J1
0.09
0.16
0.003
0.006
K
0.25
0.38
0.010
0.015
K1
0.25
0.33
0.010
0.013
_
_
_
_
NOTES:
13 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14 CONTROLLING DIMENSION: MILLIMETER.
15 DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
16 DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
17 DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION/INTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF K DIMENSION AT MAXIMUM
MATERIAL CONDITION. DAMBAR INTRUSION
SHALL NOT REDUCE DIMENSION K BY MORE
THAN 0.07 (0.002) AT LEAST MATERIAL
CONDITION.
18 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
19 DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
L
7.65
7.90
0.301
0.311
M
0
8
0
8
DETAIL E
–W–
background image
MC74LVQ244
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
8
How to reach us:
USA/EUROPE: Motorola Literature Distribution;
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P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447
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