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Philips
Semiconductors
74ABT273A
Octal D-type flip-flop
Product specification
1995 Sep 06
INTEGRATED CIRCUITS
IC23 Data Handbook
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
2
1995 Sep 06
853-1774 15704
FEATURES
Eight edge-triggered D-type flip-flops
Buffered common clock
Buffered asynchronous Master Reset
Power-up reset
See 74ABT377 for clock enable version
See 74ABT373 for transparent latch version
See 74ABT374 for 3-State version
ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common elements.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
CP to Qn
C
L
= 50pF; V
CC
= 5V
3.0
3.4
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
3.5
pF
I
CCH
Total supply current
Outputs High; V
CC
=5.5V
150
µ
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic DIP
–40
°
C to +85
°
C
74ABT273A N
74ABT273A N
SOT146-1
20-Pin plastic SO
–40
°
C to +85
°
C
74ABT273A D
74ABT273A D
SOT163-1
20-Pin Plastic SSOP Type II
–40
°
C to +85
°
C
74ABT273A DB
74ABT273A DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40
°
C to +85
°
C
74ABT273A PW
7ABT273APW DH
SOT360-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Q4
GND
D4
D5
Q5
Q6
D6
D7
Q7
VCC
CP
SA00052
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
11
CP
Clock pulse input (active rising edge)
3, 4, 7, 8, 13,
14, 17, 18
D0 - D7
Data inputs
2, 5, 6, 9, 12,
15, 16, 19
Q0 - Q7
Data outputs
1
MR
Master Reset input (active-Low)
10
GND
Ground (0V)
20
V
CC
Positive supply voltage
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
3
LOGIC SYMBOL (IEEE/IEC)
11
3
2
4
5
7
6
8
9
C1
13
12
14
15
17
16
18
19
1
R
1D
SA00054
LOGIC SYMBOL
3
4
7
8
13
14
18
17
D0 D1 D2 D3 D4 D5 D6 D7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2
5
6
9
12 15 16
19
1
11
MR
CP
SA00053
LOGIC DIAGRAM
CP
Q
RD
D
3
D0
Q0
CP
Q
RD
D
4
D1
CP
Q
RD
D
7
D2
CP
Q
RD
D
8
D3
CP
Q
RD
D
13
D4
CP
Q
RD
D
14
D5
CP
Q
RD
D
17
D6
CP
Q
RD
D
18
D7
2
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
11
1
CP
MR
SA00055
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING MODE
MR
CP
Dn
Q0 - Q7
OPERATING MODE
L
X
X
L
Reset (clear)
H
h
H
Load ”1”
H
l
L
Load ”0”
H = High voltage level
h
= High voltage level one set-up time prior to the Low-to-High
clock transition
L
= Low voltage level
l
= Low voltage level one set-up time prior to the Low-to-High
clock transition
X = Don’t care
= Low-to-High clock transition
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
4
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
-0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0
-18
mA
V
I
DC input voltage
3
-1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
-50
mA
V
OUT
DC output voltage
3
output in Off or High state
-0.5 to +5.5
V
I
OUT
DC output current
output in Low state
128
mA
T
stg
Storage temperature range
-65 to 150
°
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
°
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
Min
Max
UNIT
V
CC
DC supply voltage
4.5
5.5
V
V
I
Input voltage
0
V
CC
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
OH
High-level output current
-32
mA
I
OL
Low-level output current
64
mA
t/
v
Input transition rise or fall rate
0
10
ns/V
T
amb
Operating free-air temperature range
-40
+85
°
C
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= -40
°
C
to +85
°
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= -18mA
-0.9
-1.2
-1.2
V
V
CC
= 4.5V; I
OH
= -3mA; V
I
= V
IL
or V
IH
2.5
2.9
2.5
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= -3mA; V
I
= V
IL
or V
IH
3.0
3.4
3.0
V
V
CC
= 4.5V; I
OH
= -32mA; V
I
= V
IL
or V
IH
2.0
2.4
2.0
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.42
0.55
0.55
V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
0.13
0.55
0.55
V
I
I
Input leakage current
V
CC
= 5.5V; V
I
= GND or 5.5V
±
0.01
±
1.0
±
1.0
µ
A
I
OFF
Power-off leakage current
V
CC
= 0.0V; V
O
or V
I
4.5V
±
5.0
±
100
±
100
µ
A
I
CEX
Output High leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
µ
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
-50
-70
-180
-50
-180
mA
I
CCH
Quiescent supply current
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
150
250
250
µ
A
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
24
30
30
mA
I
CC
Additional supply current per
input pin
2
V
CC
= 5.5V; One data input at 3.4V, other
inputs at V
CC
or GND
0.5
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
°
C
V
CC
= +5.0V
T
amb
= -40
°
C to +85
°
C
V
CC
= +5.0V
±
0.5V
UNIT
Min
Typ
Max
Min
Max
f
MAX
Maximum clock frequency
1
250
350
250
MHz
t
PLH
t
PHL
Propagation delay
CP to Qn
1
1.5
2.0
3.0
3.4
4.0
4.6
1.5
2.0
4.8
4.8
ns
t
PHL
Propagation delay
MR to Qn
2
2.5
4.5
6.0
2.5
6.6
ns
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
6
AC SETUP REQUIREMENTS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= +25
°
C
V
CC
= +5.0V
T
amb
= -40
°
C to +85
°
C
V
CC
= +5.0V
±
0.5V
UNIT
Min
Typ
Min
t
s
(H)
t
s
(L)
Setup time, High or Low
Dn to CP
3
1.5
1.5
0.6
0.4
1.5
1.5
t
h
(H)
t
h
(L)
Hold time, High or Low
Dn to CP
3
0.7
0.7
-0.5
-0.5
0.7
0.7
ns
t
w
(H)
t
w
(L)
Clock pulse width
High or Low
1
1.5
2.0
0.8
1.0
1.5
2.0
ns
t
w
(L)
Master Reset pulse width, Low
2
1.5
0.8
1.5
ns
t
REC
Recovery time
MR to CP
2
1.5
0.5
1.5
ns
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
The shaded areas indicate when the input is permitted to change for predictable output performance.
VM
VM
VM
VM
VM
1/fMAX
tw(H)
tw(L)
tPHL
tPLH
CP
Qn
SA00056
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
V
M
SF00158
MR
Qn
V
M
t
w
(L)
t
PHL
V
M
t
REC
CP
V
M
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
th(H)
ts(H)
CP
SF00191
VM
VM
VM
VM
VM
VM
th(L)
ts(L)
Dn
Waveform 3. Data Setup and Hold Times
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
7
TEST CIRCUIT AND WAVEFORMS
PULSE
GENERATOR
RT
VIN
D.U.T.
VOUT
CL
RL
VCC
RL
7.0V
Test Circuit for 3-State Outputs
VM
VM
tW
AMP (V)
NEGATIVE
PULSE
10%
10%
90%
90%
0V
VM
VM
tW
AMP (V)
POSITIVE
PULSE
90%
90%
10%
10%
0V
tTHL (tF)
tTLH (tR)
tTHL (tF)
tTLH (tR)
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R
L
=
Load resistor; see AC CHARACTERISTICS for value.
C
L
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
=
Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
74ABT
SA00057
SWITCH POSITION
TEST
SWITCH
All
open
Amplitude
Rep. Rate
t
W
t
F
3.0V
1MHz
500ns
2.5ns
t
R
2.5ns
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
8
1995 Sep 06
DIP20:
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
9
SO20:
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
10
SSOP20:
plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
1995 Sep 06
11
TSSOP20:
plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
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Philips Semiconductors
Product specification
74ABT273A
Octal D-type flip-flop
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
©
Copyright Philips Electronics North America Corporation 1995
All rights reserved. Printed in U.S.A.