Copyright © 2000
Rev. 1.6 4/00
F O R F U R T H E R I N F O R M A T I O N C A L L ( 7 1 4 ) 8 9 8 - 8 1 2 1
11861 W
ESTERN
A
VENUE
, G
ARDEN
G
ROVE
, CA. 92841
1
C
U R R E N T
M
O D E
P W M C
O N T R O L L E R
P
R O D U C T I O N
D
A T A
S
H E E T
T
H E
I
N F I N I T E
P
O W E R
O F
I
N N O V A T I O N
SG1842/SG1843 Series
LIN D
O C
#: 1842
D E S C R I P T I O N
K E Y F E A T U R E S
s OPTIMIZED FOR OFF-LINE CONTROL
s LOW START-UP CURRENT (<1mA)
s AUTOMATIC FEED FORWARD
COMPENSATION
s TRIMMED OSCILLATOR DISCHARGE
CURRENT
s PULSE-BY-PULSE CURRENT LIMITING
s ENHANCED LOAD RESPONSE
CHARACTERISTICS
s UNDER-VOLTAGE LOCKOUT WITH 6V
HYSTERESIS (SG1842 only)
s DOUBLE-PULSE SUPPRESSION
s HIGH-CURRENT TOTEM-POLE OUTPUT
(1AMP PEAK)
s INTERNALLY TRIMMED BANDGAP
REFERENCE
s 500KHZ OPERATION
s UNDERVOLTAGE LOCKOUT
SG1842 - 16 volts
SG1843 - 8.4 volts
s LOW SHOOT-THROUGH CURRENT <75mA
OVER TEMPERATURE
The SG1842/43 family of control IC's
provides all the necessary features to
implement off-line fixed frequency,
current-mode switching power supplies
with a minimum number of external
components. Current-mode
architecture demonstrates improved
line regulation, improved load
regulation, pulse-by-pulse current
limiting and inherent protection of the
power supply output switch.
The bandgap reference is trimmed to
±1% over temperature. Oscillator
discharge current is trimmed to less
than ±10%. The SG1842/43 has under-
P R O D U C T H I G H L I G H T
P A C K A G E O R D E R I N F O R M A T I O N
T
A
(°C)
0 to 70
SG3842M
SG3842N
SG3842DM
SG3842D
SG3842Y
SG3842J
—
—
SG3843M
SG3843N
SG3843DM
SG3843D
SG3843Y
SG3843J
—
—
-25 to 85
SG2842M
SG2842N
SG2842DM
SG2842D
SG2842Y
SG2842J
—
—
SG2843M
SG2843N
SG2843DM
SG2843D
SG2843Y
SG2843J
—
—
-55 to 125
—
—
—
—
SG1842Y
SG1842J
—
SG1842L
—
—
—
—
SG1843Y
SG1843J
—
SG1843L
MIL-STD/883
—
—
—
—
SG1842Y/883B SG1842J/883B
—
SG1842L/883B
—
—
—
—
SG1843Y/883B SG1843J/883B
—
SG1843L/883B
DESC
—
—
—
—
SG1842Y/DESC SG1842J/DESC
SG1842F/DESC SG1842L/DESC
—
—
SG1843Y/DESC SG1843J/DESC
SG1843F/DESC SG1843L/DESC
T
Y P I C A L
A
P P L I C AT I O N
O F
SG3842 I
N
A F
LY B A C K
C
O N V E R T E R
HIGH RELIABILITY FEATURES
s AVAILABLE TO MIL-STD-883B AND DESC
SMD
s SCHEDULED FOR MIL-M38510 QPL LISTING
s RADIATION DATA AVAILABLE
s LINFINITY LEVEL "S" PROCESSING AVAILABLE
Note: All surface-mount packages are available in Tape & Reel.
voltage lockout, current limiting
circuitry and start-up current of less
than 1mA.
The totem-pole output is optimized
to drive the gate of a power MOSFET.
The output is low in the off state to
provide direct interface to an N
channel device.
The SG1842/43 is specified for
operation over the full military ambient
temperature range of -55°C to 125°C.
The SG2842/43 is specified for the
industrial range of -25°C to 85°C, and
the SG3842/43 is designed for the
commercial range of 0°C to 70°C.
Plastic DIP
8-pin
M
Plastic DIP
14-pin
N
Plastic SOIC
8-pin
DM
Plastic SOIC
14-pin
D
Ceramic DIP
8-pin
Y
Ceramic DIP
14-pin
J
Cer. Flatpack
10-pin
F
Ceramic LCC
20-pin
L
AC
INPUT
SG3842
R
ST
I
ST
V
CC
C
U R R E N T
- M
O D E
P W M C
O N T R O L L E R
SG1842/SG1843 Series
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
Copyright © 2000
Rev. 1.6 4/00
2
P
R O D U C T I O N
D
A T A
S
H E E T
A B S O L U T E M A X I M U M R AT I N G S
(Notes 1 & 2)
Supply Voltage (I
CC
< 30mA) ............................................................... Self Limiting
Supply Voltage (Low Impedance Source) ........................................................ 30V
Output Current (Peak) ....................................................................................... ±1A
Output Current (Continuous) ....................................................................... 350mA
Output Energy (Capacitive Load) ....................................................................... 5µJ
Analog Inputs (Pins 2, 3) ................................................................. -0.3V to +6.3V
Error Amp Output Sink Current ..................................................................... 10mA
Power Dissipation at T
A
= 25°C (DIL-8) ............................................................ 1W
Operating Junction Temperature
Hermetic (J, Y, F, L Packages) ................................................................... 150°C
Plastic (N, M, D, DM Packages) ................................................................ 150°C
Storage Temperature Range .......................................................... -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) .................................................. 300°C
PACKAGE PIN OUTS
V
REF
V
CC
OUTPUT
GND
COMP
V
FB
I
SENSE
R
T
/C
T
1
8
2
7
3
6
4
5
M & Y PACKAGE
(Top View)
DM PACKAGE
(Top View)
V
REF
V
CC
OUTPUT
GND
COMP
V
FB
I
SENSE
R
T
/C
T
1
8
2
7
3
6
4
5
V
REF
N.C.
V
CC
V
C
OUTPUT
GND
PWR GND
COMP
N.C.
V
FB
N.C.
I
SENSE
N.C.
R
T
/C
T
1
14
2
13
3
12
4
11
5
10
6
9
7
8
D PACKAGE
(Top View)
M PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
95°C/W
N PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
65°C/W
DM PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
165°C/W
D PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
120°C/W
Y PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
130°C/W
J PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
80°C/W
F PACKAGE:
THERMAL RESISTANCE-JUNCTION TO CASE,
θθθθθ
JC
80°C/W
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
145°C/W
L PACKAGE:
THERMAL RESISTANCE-JUNCTION TO CASE,
θθθθθ
JC
35°C/W
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θθθθθ
JA
120°C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
T H E R M A L D ATA
Note 1. Exceeding these ratings could cause damage to the device.
Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified
terminal.
1
14
2
13
3
12
4
11
5
10
6
9
7
8
J & N PACKAGE
(Top View)
COMP
N.C.
V
FB
N.C.
I
SENSE
N.C.
R
T
/C
T
V
REF
N.C.
V
CC
V
C
OUTPUT
GROUND
POWER GND
F PACKAGE
(Top View)
10.V
REF
9. V
CC
8. V
C
7. OUTPUT
6. GND
1. COMP
2. V
FB
3. I
SENSE
4. R
T
/C
T
5. POWER GND
1
10
2
9
3
8
4
7
5
6
L PACKAGE
(Top View)
3
2
4
5
6
7
8
9
11
10
1. N.C.
2. COMP
3. N.C.
4. N.C.
5. V
FB
6. N.C.
7. I
SENSE
8. N.C.
9. N.C.
10. R
T
/C
T
1 20 19
18
17
16
15
14
12 13
11. N.C.
12. GROUND
13. N.C.
14. N.C.
15. OUTPUT
16. N.C.
17. V
CC
18. N.C.
19. N.C.
20. V
REF
C
U R R E N T
- M
O D E
P W M C
O N T R O L L E R
SG1842/SG1843 Series
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
3
Copyright © 2000
Rev. 1.6 4/00
P
R O D U C T I O N
D
A T A
S
H E E T
E L E C T R I C A L C H A R A C T E R I S T I C S
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1842/SG1843 with -55°C
≤ T
A
≤ 125°C, SG2842/
SG2843 with -25°C
≤ T
A
≤ 85°C, SG3842/SG3843 with 0°C ≤ T
A
≤ 70°C, V
CC
= 15V (Note 7), R
T
= 10k
Ω, and C
T
= 3.3nF. Low duty cycle pulse testing
techniques are used which maintains junction and case temperatures equal to the ambient temperature.)
Reference Section
Parameter
Symbol
Test Conditions
Output Voltage
T
J
= 25°C, I
O
= 1mA
Line Regulation
12
≤ V
IN
≤ 25V
Load Regulation
1
≤ I
O
≤ 20mA
Temperature Stability (Note 4)
Total Output Variation (Note 4)
Line, Load, Temp.
Output Noise Voltage (Note 4)
V
N
10Hz
≤ f ≤ 10kHz, T
J
= 25°C
Long Term Stability (Note 4)
T
A
= 125°C, 1000hrs
Output Short Circuit
SG3842/43
Units
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
SG2842/43
4.95 5.00 5.05 4.95 5.00 5.05 4.90 5.00 5.10
V
6
20
6
20
6
20
mV
6
25
6
25
6
25
mV
0.2
0.4
0.2
0.4
0.2
0.4
mV/°C
4.90
5.10 4.90
5.10 4.82
5.18
V
50
50
50
µV
5
25
5
25
5
25
mV
-30
-100 -180
-30
-100 -180
-30
-100 -180
mA
Oscillator Section
Initial Accuracy
T
J
= 25°C
Voltage Stability
12
≤ V
CC
≤ 25V
Temperature Stability (Note 4)
T
MIN
≤ T
A
≤ T
MAX
Amplitude
V
RT/CT
(Peak to Peak)
Discharge Current
T
J
= 25°C
T
MIN
≤ T
A
≤ T
MAX
Error Amp Section
Input Voltage
V
COMP
= 2.5V
Input Bias Current
Open Loop Gain
A
VOL
2
≤ V
O
≤ 4V
Unity Gain Bandwidth (Note 4)
T
J
= 25°C
Power Supply Rejection Ratio
PSRR
12
≤ V
CC
≤ 25V
Output Sink Current
V
VFB
= 2.7V, V
COMP
= 1.1V
Output Source Current
V
VFB
= 2.3V, V
COMP
= 5V
V
OUT
High
V
VFB
= 2.3V, R
L
= 15K to gnd
V
OUT
Low
V
VFB
= 2.7V, R
L
= 15K to V
REF
SG1842/43
47
52
57
47
52
57
47
52
57
kHz
0.2
1
0.2
1
0.2
1
%
5
5
5
%
1.7
1.7
1.7
V
7.8
8.3
8.8
7.5
8.4
9.3
7.5
8.4
9.3
mA
7.0
9.0
7.2
9.5
7.2
9.5
mA
2.45 2.50 2.55 2.45 2.50 2.55 2.42 2.50 2.58
V
-0.3
-1
-0.3
1
-0.3
-2
µA
65
90
65
90
65
90
dB
0.7
1
0.7
1
0.7
1
MHz
60
70
60
70
60
70
dB
2
6
2
6
2
6
mA
-0.5
-0.8
-0.5
-0.8
-0.5
-0.8
mA
5
6
5
6
5
6
V
0.7
1.1
0.7
1.1
0.7
1.1
V
Supply Voltage Range
Output Current (Peak)
Output Current (Continuous)
Analog Inputs (Pin 2, Pin 3)
Error Amp Output Sink Current
Oscillator Frequency Range
Oscillator Timing Resistor
R
T
Oscillator Timing Capacitor
C
T
Operating Ambient Temperature Range:
SG1842/43
SG2842/43
SG3842/43
R E C O M M E N D E D O P E R A T I N G C O N D I T I O N S
(Note 3)
Parameter
Symbol
Units
Recommended Operating Conditions
Min.
Typ.
Max.
30
V
±1
A
200
mA
0
2.6
V
5
mA
0.1
500
kHz
0.52
150
K
Ω
0.001
1.0
µF
-55
125
°C
-25
85
°C
0
70
°C
Note 3. Range over which the device is functional.
( E l e c t r i c a l C h a r a c t e r i s t i c s c o n t i n u e n e x t p a g e . )
C
U R R E N T
- M
O D E
P W M C
O N T R O L L E R
SG1842/SG1843 Series
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
Copyright © 2000
Rev. 1.6 4/00
4
P
R O D U C T I O N
D
A T A
S
H E E T
E L E C T R I C A L C H A R A C T E R I S T I C S
(Cont'd.)
Under-Voltage Lockout Section
Parameter
Symbol
Test Conditions
Start Threshold
1842
1843
Min. Operation Voltage After Turn-On
1842
1843
PWM Section
Maximum Duty Cycle
Minimum Duty Cycle
Power Consumption Section
Start-Up Current
Operating Supply Current
V
FB
= V
ISENSE
= 0V
V
CC
Zener Voltage
I
CC
= 25mA
Notes: 4. These parameters, although guaranteed, are not 100% tested in
production.
5. Parameter measured at trip point of latch with V
VFB
= 0.
SG3842/43
Units
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
SG2842/43
15
16
17
15
16
17
14.5
16
17.5
V
7.8
8.4
9.0
7.8
8.4
9.0
7.8
8.4
9.0
V
9
10
11
9
10
11
8.5
10
11.5
V
7.0
7.6
8.3
7.0
7.6
8.2
7.0
7.6
8.2
V
SG1842/43
93
95
100
90
95
100
90
95
100
%
0
0
0
%
0.5
1
0.5
1
0.5
1
mA
11
17
11
17
11
17
mA
34
34
34
V
6. Gain defined as: A =
; 0
≤ V
ISENSE
≤ 0.8V.
7. Adjust V
CC
above the start threshold before setting at 15V.
Output Low Level
I
SINK
= 20mA
I
SINK
= 200mA
Output High Level
I
SOURCE
= 20mA
I
SOURCE
= 200mA
Rise Time
T
J
= 25°C, C
L
= 1nF
Fall Time
T
J
= 25°C, C
L
= 1nF
Current Sense Section
Gain (Notes 5 & 6)
Maximum Input Signal (Note 5)
V
COMP
= 5V
Power Supply Rejection Ratio (Note 5)
PSRR
12
≤ V
CC
≤ 25V
Input Bias Current
Delay to Output (Note 4)
Output Section
2.85
3
3.15 2.85
3
3.15 2.85
3
3.15
V/V
0.9
1
1.1
0.9
1
1.1
0.9
1
1.1
V
70
70
70
dB
-2
-10
-2
-10
-2
-10
µA
150
300
150
300
150
300
ns
0.1
0.4
0.1
0.4
0.1
0.4
V
1.5
2.2
1.5
2.2
1.5
2.2
V
13
13.5
13
13.5
13
13.5
V
12
13.5
12
13.5
12
13.5
V
50
150
50
150
50
150
ns
50
150
50
150
50
150
ns
∆ V
COMP
∆ V
ISENSE
C
U R R E N T
- M
O D E
P W M C
O N T R O L L E R
SG1842/SG1843 Series
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
5
Copyright © 2000
Rev. 1.6 4/00
P
R O D U C T I O N
D
A T A
S
H E E T
B L O C K D I A G R A M
* - V
CC
and V
C
are internally connected for 8 pin packages.
** - POWER GROUND and GROUND are internally connected for 8 pin packages.
OSCILLATOR
S
R
V
REF
GOOD LOGIC
INTERNAL
BIAS
S / R
5V
REF
PWM
LATCH
CURRENT SENSE
COMPARATOR
1V
R
2R
ERROR AMP
UVLO
34V
GROUND**
V
CC
*
R
T
/C
T
V
FB
COMP
CURRENT SENSE
POWER GROUND**
OUTPUT
V
C
*
V
REF
5.0V
50mA
16V (1842)
8.4V (1843)
6V (1842)
0.