The CS8140 is a 5V Watchdog
Regulator with protection circuitry and
three logic control functions that allow
a microprocessor to control its own
power supply. The CS8140 is designed
for use in automotive, switch mode
power supply post regulator, and bat-
tery powered systems.
Basic regulator performance character-
istics include a low noise, low drift, 5V
± 4% precision output voltage with low
dropout voltage (1.25V @ I
OUT
= 500mA)
and low quiescent current (7mA @ I
OUT
= 500mA). On board short circuit, ther-
mal, and overvoltage protection make it
possible to use this regulator in particu-
larly harsh operating environments.
The Watchdog logic function monitors
an input signal (WDI) from the micro-
processor or other signal source. When
the signal frequency moves outside
externally programmable window lim-
its, a
signal is generated
(
). An external capacitor
(C
DELAY
) programs the watchdog win-
dow frequency limits as well as the
power on reset (POR) and
delay.
The
function is activated by any
of three conditions: the watchdog sig-
nal moves outside of its preset limits;
the output voltage drops out of regula-
tion by more than 4.5%; or the IC is in
its power up sequence. The
sig-
nal is independent of V
IN
and reliable
down to V
OUT
= 1V.
In conjunction with the Watchdog, the
ENABLE function controls the regula-
torÕs power consumption. The CS8140Õs
output stage and its attendant circuitry
are enabled by setting the ENABLE
lead high. The regulator goes into sleep
mode (I
OUT
= 250µA) when the
ENABLE lead goes low and the watch-
dog signal moves outside its preset
window limits. This unique combina-
tion of control functions in the CS8140
gives the microprocessor control over
its own power down sequence: i.e. it
gives the microprocessor the flexibility
to perform housekeeping functions
before it powers down.
The CS8141 has the same features as the
CS8140, except that the CS8141 only
responds to input signals (WDI) which
are below the preset watchdog frequen-
cy threshold.
RESET
RESET
RESET
RESET
RESET
1
Features
Gnd
WDI
ENABLE
VIN
VOUT
Delay
Overvoltage
Overtemperature
Reference
& Bias
Short Circuit
Watchdog
Undervoltage
Regulation
RESET
Control Logic
ENABLE
RESET
Delay
Sense
*NOTE: shorted together
on 7 Lead TO-220
*
s
5V ± 4%, 500mA Output
Voltage
s
µP Compatible Control
Functions
Watchdog
ENABLE
s
Low Dropout Voltage
(1.25V @ 500mA)
s
Low Quiescent Current
(7mA @ 500mA)
s
Low Noise, Low Drift
s
Low Current SLEEP Mode
(I
Q
= 250µA)
s
Fault Protection
Thermal Shutdown
Short Circuit
60V Peak Transient
Voltage
RESET
Package Options
7 Lead TO-220
Tab (Gnd)
14 Lead PDIP
24 Lead SOIC Wide
CS8140/1
5V, 500mA Linear Regulator with
ENABLE,
, and Watchdog
RESET
1
1
Delay
V
OUT
Sense
WDI
NC
NC
NC
NC
NC
V
IN
ENABLE
RESET
Gnd
NC
NC
NC
Gnd
NC
NC
NC
NC
NC
NC
NC
CS8140/1
Description
Block Diagram
1
Delay
V
OUT
Sense
WDI
NC
NC
NC
NC
NC
Gnd
V
IN
ENABLE
RESET
NC
1 V
IN
2 ENABLE
3
4 Gnd
5 Delay
6 WDI
7 V
OUT
RESET
A Company
¨
Rev. 2/23/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
2
Electrical Characteristics:
7V ² V
IN
² 26V, 5mA ² I
OUT
² 500mA, -40ûC ² T
J
² +150ûC, -40ûC ² T
A
² 125ûC
unless otherwise specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Absolute Maximum Ratings
Input Voltage
Operating Range .................................................................................................................................................-0.5 to +26V
Peak Transient Voltage (46V Load Dump @ 14V V
BAT
) ..............................................................................................60V
Electrostatic Discharge
(Human Body Model)...............................................................................................................................................4kV
WDI Input Signal Range ...............................................................................................................................................-0.3 to +7V
Internal Power Dissipation ..............................................................................................................................Internally limited
Junction Temperature Range (TJ) .......................................................................................................................-40¡C to +150¡C
Storage Temperature Range ................................................................................................................................-65¡C to +150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak
ENABLE .......................................................................................................................................................................-0.3V to V
IN
CS8140/1
s Output Stage (V
OUT
)
Output Voltage, V
OUT
7V ² V
IN
² 26V
4.8
5.0
5.2
V
5mA < I
OUT
< 500mA
Dropout Voltage (V
IN
- V
OUT
)
I
OUT
= 500mA
1.25
1.50
V
Line Regulation
I
OUT
= 50mA,
5
25
mV
7V ² V
IN
² 26V
Load Regulation
V
IN
= 14V,
5
80
mV
50mA ² I
OUT
² 500mA
Output Impedance, R
OUT
500mA DC and 10mA AC ,
200
m½
100Hz ² f ² 10kHz
Quiescent Current, (I
Q
)
Active Mode
0 ² I
OUT
² 500mA, 7V ² V
IN
² 26V
7.00
15.00
mA
Sleep Mode
I
OUT
= 0mA, V
IN
= 13V, ENABLE = 0V
0.25
0.50
mA
Ripple Rejection
7 ² V
IN
² 17V, I
OUT
= 250mA,
60
75
dB
f = 120Hz
Current Limit
700
1200
2000
mA
Thermal Shutdown
150
180
¡C
Overvoltage Shutdown
V
OUT
< 1V
30
34
38
V
s ENABLE
Threshold
HIGH
V
OUT
³ 0.5V, (V
OUT(ON)
)
4.05
4.50
V
LOW
V
OUT
< 0.5V, (V
OUT(OFF)
)
3.50
3.95
V
Threshold Hysteresis
(HIGH - LOW)
100
mV
3
Package Lead Description
Package Lead #
Lead Symbol
Function
Electrical Characteristics: continued
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CS8140/1
s
Threshold
HIGH V
R(HI)
V
OUT
increasing
4.65
4.90 V
OUT
- 0.05
V
LOW V
R(LOW)
V
OUT
decreasing
4.50
4.70
4.90
V
Threshold Hysteresis(V
RH
)
(HIGH - LOW)
150
200
250
mV
Reset Output Leakage
V
OUT
³ V
R(HI)
25
µA
= HIGH
Output Voltage
Low(V
L(LOW)
)
1V ² V
OUT
² V
R(LOW)
0.1
0.4
V
Rp = 2.7k½*
Low (V
Rpeak
)
V
OUT
, Power up, Power down
0.6
1.0
V
Delay Times
C
DELAY
= 0.1µF
t
POR
30.0
47.5
65.0
ms
t
WDI(
)
0.5
1.0
1.5
ms
s Watchdog
Input Voltage
HIGH
2.0
V
LOW
0.8
V
Input Current
WDI ² V
OUT
0
10
µA
Threshold Frequency
C
DELAY
= 0.1µF
f
WDILOWER
64
77
96
Hz
f
WDI(UPPER)
**
218
262
326
Hz
* R
P
is connected to
and V
OUT
.
** CS8140 only
To observe safe operating junction temperature, low duty cycle pulse testing is used on tests where applicable.
RESET
RESET
RESET
RESET
7 Lead
24 Lead *
14 Lead
TO-220
SOIC Wide
PDIP
1
21
12
V
IN
Supply voltage to IC, usually direct from the battery.
2
23
13
ENABLE
CMOS compatible logical input. V
OUT
is disabled when
ENABLE is LOW and WDI is beyond its preset limits.
3
24
14
CMOS compatible output lead.
goes low whenever
V
OUT
drops below 4.5% of its typical value for more than
2µs or WDI signal falls outside itÕs window limits.
4
12, 20
11
Gnd
Ground connection.
5
2
1
Delay
Timing capacitor for Watchdog and
functions.
6
3
2
WDI
CMOS compatible input lead. The Watchdog function mon-
itors the falling edge of the incoming digital pulse train. The
signal is usually generated by the system microprocessor.
7
4
3
V
OUT
Regulated output voltage, 5V (typ).
N/A
5
4
Sense
Kelvin connection which allows remote sensing of output
voltage for improved regulation.
1,6-11,13-19,22
5-10
NC
No connection.
* The CS8141 uses a fused lead package. Leads 6-8 and 17-19 are fused together through the lead frame. These leads are
electrically connected to IC ground and should be connected to system ground for a good thermal connection.
RESET
RESET
RESET
4
Typical Performance Characteristics
CS8140/1
0
1
2
3
4
5
6
7
8
9
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
R
load
= NO LOAD
V
OUT
(V)
V
IN
(V)
V
ENABLE
= V
IN
R
load
= 6.67
W
R
load
= 10
W
V
OUT
vs. V
IN
over R
LOAD
; T = 25ûC
0
1
2
3
4
5
6
7
8
9
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
V
OUT
(V)
V
IN
(V)
TEMP = 25
°C
TEMP = 125
°C
TEMP = -40
°C
V
ENABLE
= V
IN
V
OUT
vs. V
IN
over Temperature; R
LOAD
= 25½
0
100
200
300
400
500
600
700
800
0
400
600
800
1200
1400
1600
1800
200
1000
-40
°C
125
°C
25
°C
I
OUT
(mA)
Dropout V
oltage (mV)
Dropout Voltage vs. Output Current over Temperature
0
100
200
300
400
500
600
700
800
-35.0
-31.5
-28.0
-24.5
-21.0
-17.5
-14.0
-10.5
-7.0
-3.5
0
3.5
-40
°C
25
°C
125
°C
V
IN
= 14V
I
OUT
(mA)
LOAD REGULA
TION (mV)
Load Regulation vs. Output Current over Temperature
0
100
200
300
400
500
600
700
800
-6
-4
-2
0
2
4
6
8
10
12
14
18
-40
°C
25
°C
125
°C
V
IN
= 14V
I
OUT
(mA)
16
LINE REGULA
TION (mV)
Line Regulation vs. Output Current over Temperature
0
100
200
300
400
500
600
700
800
4
5
6
7
8
9
10
-40
°C
125
°C
25
°C
I
OUT
(mA)
I
Q
(mA)
V
IN
= 14V
Quiescent Current vs. Output Current over Temperature
5
Typical Performance Characteristics: continued
CS8140/1
0
1
2
3
4
5
6
7
8
9
10
0
2
4
8
10
12
14
16
18
20
V
IN
(V)
I
Q
(mA)
6
R
load
= NO LOAD
R
load
= 6.67
R
load
= 25
V
ENABLE
= V
IN
Quiescent Current vs. V
IN
over R
LOAD
; T = 25¡C
0
1
2
3
4
5
6
7
8
9
10
0
2
4
8
10
12
14
16
18
20
TEMP = 125
°C
TEMP = 25
°C
TEMP =- 40
°C
V
IN
(V)
I
Q
(mA)
6
V
ENABLE
= V
IN
Quiescent Current vs. V
IN
over Temperature; R
LOAD
= 25½
-40 -30
-10
10
20
40
60
70
90
110 120
60
80
100
120
140
160
180
200
220
240
260
280
-20
0
30
50
80
100
130 140 150
300
T
J
(
°C)
FREQUENCY
(Hz)
Lower Threshold
C
DELAY
= 0.1
m
F
Upper Threshold
Watchdog Frequency Thresholds vs. Temperature
10
5
10
4
10
3
10
2
10
1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
CAPACITANCE (pF)
WDI THRESHOLD
10
6
Lower Threshold
10
7
10
7
Upper Threshold
Watchdog Frequency Threshold vs C
DELAY
90
80
70
60
50
40
30
20
10
0
REJECTION (dB)
FREQUENCY (Hz)
C
O
= 10
mF, ESR=10W
C
O
= 10
mF,ESR=1W
C
O
= 10
mF, ESR=1&0.1mF, ESR=0
I
O
=250mA
10
0
10
1
10
2
10
3
10
4
10
5
10
6
10
7
10
8
Ripple Rejection vs Frequency
2000
1800
1600
1400
1200
1000
800
600
400
200
0
1
5
10
15
20
25
30
35
40
V
IN
= 5V
RESET OUTPUT CURRENT (mA)
RESET
OUTPUT
VOL
T
AGE (mV)
RESET Output Voltage vs Output Current
Precision Voltage Reference
The regulated output voltage depends on the precision
band gap voltage reference in the IC. By adding an error
amplifier into the feedback loop , the output voltage is main-
tained within ±4% over temperature and supply variation.
Output Stage
The composite PNP-NPN output structure (Figure1) pro-
vides 500mA (min) of output current while maintaining a
low drop out voltage (1.25V) and drawing little quiescent
current (7mA).
Figure 1: Composite Output Stage of the CS8140/1
The NPN pass device prevents deep saturation of the out-
put stage which in turn improves the ICÕs efficiency by
preventing excess current from being used and dissipated
by the IC.
Output Stage Protection
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 2).
If the input voltage rises above 30V (e.g. load dump), the
output shuts down. This response protects the internal cir-
cuitry and enables the IC to survive unexpected voltage
transients.
Using an emitter sense scheme, the amount of current
through the NPN pass transistor is monitored. Feedback
circuitry insures that the output current never exceeds a
preset limit.
Figure 2: Typical Circuit Waveforms for Output Stage Protection.
Should the junction temperature of the power device
exceed 180ûC (typ), the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle heat
source in the IC.
The CS8140 differs from all other linear regulators in its
unique combination of control features.
Watchdog and ENABLE Functions
V
OUT
is controlled by the logic functions ENABLE and
Watchdog (Table 1).
Table 1: V
OUT
as a Function of ENABLE and Watchdog
WDI
ENABLE
Slow
Normal
Fast
High
Low
H
5
5
5
5
5
L
0
5
0
0
0
V
OUT
(V)
Regulator Control Functions
I
O
V
OUT
V
IN
Load
Dump
Short
Circuit
Thermal
Shutdown
> 30V
V
OUT
V
IN
Voltage Reference and Output Circuitry
6
CS8140/1
Dropout Voltage
The input-output voltage differential at which the circuit
ceases to regulate against further reduction in input volt-
age. Measured when the output voltage has dropped
100mV from the nominal value obtained at 14V input,
dropout voltage is dependent upon load current and junc-
tion temperature.
Input Voltage
The DC voltage applied to the input terminals with respect
to ground.
Line Regulation
The change in output voltage for a change in the input
voltage. The measurement is made under conditions of
low dissipation or by using pulse techniques such that the
average chip temperature is not significantly affected.
Load Regulation
The change in output voltage for a change in load current
at constant chip temperature.
Quiescent Current
The part of the positive input current that does not con-
tribute to the positive load current. The regulator ground
lead current.
Ripple Rejection
The ratio of the peak-to-peak input ripple voltage to the
peak-to-peak output ripple voltage.
Current Limit
Peak current that can be delivered to the output.
Definition of Terms
Circuit Description
7
Battery
Battery
V
IN
ENABLE
WDI
RESET
V
OUT 0V
0V
0V
POR
Normal Operation
WDI held High
Figure 3: Timing Diagrams for Watchdog and ENABLE Functions
3a: V
OUT
when Watchdog is held high and ENABLE = HIGH.
Battery
Battery
V
IN
WDI
RESET
V
OUT 0V
0V
0V
POR
Normal Operation
WDI held Low
ENABLE
3b: V
OUT
when Watchdog is held low and ENABLE = HIGH.
Battery
Battery
V
IN
WDI
RESET
V
OUT 0V
0V
0V
POR
Normal Operation
Slow WDI signal
ENABLE
3c: V<