LP3962/LP3965 1.5A Fast Ultra Low Dropout Linear Regulators

LP3962/LP3965

1.5A Fast Ultra Low Dropout Linear Regulators

General Description

The LP3962/LP3965 series of fast ultra low-dropout linear

regulators operate from a +2.5V to +7.0V input supply. Wide

range of preset output voltage options are available. These

ultra low dropout linear regulators respond very fast to step

changes in load which makes them suitable for low voltage

microprocessor applications. The LP3962/LP3965 are de-

veloped on a CMOS process which allows low quiescent

current operation independent of output load current. This

CMOS process also allows the LP3962/LP3965 to operate

under extremely low dropout conditions.

Dropout Voltage: Ultra low dropout voltage; typically 38mV

at 150mA load current and 380mV at 1.5A load current.

Ground Pin Current: Typically 5mA at 1.5A load current.

Shutdown Mode: Typically 15µA quiescent current when

the shutdown pin is pulled low.

Error Flag: Error flag goes low when the output voltage

drops 10% below nominal value (for LP3962).

SENSE: Sense pin improves regulation at remote loads.

(For LP3965)

Precision Output Voltage: Multiple output voltage options

are available ranging from 1.2V to 5.0V and adjustable, with

a guaranteed accuracy of

1.5% at room temperature, and

3.0% over all conditions ( varying line, load, and tempera-

ture).

Features

Ultra low dropout voltage

Low ground pin current

Load regulation of 0.04%

15µA quiescent current in shutdown mode

Guaranteed output current of 1.5A DC

Available in SOT-223,TO-263 and TO-220 packages

Output voltage accuracy

1.5%

Error flag indicates output status (LP3962)

Sense option improves better load regulation (LP3965)

Extremely low output capacitor requirements

Overtemperature/overcurrent protection

−40˚C to +125˚C junction temperature range

Applications

Microprocessor power supplies

GTL, GTL+, BTL, and SSTL bus terminators

Power supplies for DSPs

SCSI terminator

Post regulators

High efficiency linear regulators

Battery chargers

Other battery powered applications

Typical Application Circuits

DS101266-1

# Minimum output capacitance is 10 µF to ensure stability over full load current range. More capacitance provides superior dynamic performance and additional

stability margin.

*SD and ERROR pins must be pulled high through a 10k

Ω

pull-up resistor. Connect the ERROR pin to ground if this function is not used. See applications sec-

tion for more information.

May 2000

LP3962/LP3965

1.5A

Fast

Ultra

Low

Dropout

Linear

Regulators

DS101266

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Connection Diagrams

(Continued)

Pin Description for SOT223-5 Package

Pin #

LP3962

LP3965

Name

Function

Name

Function

Shutdown

Input Supply

OUT

Output Voltage

OUT

Output Voltage

ERROR

ERROR Flag

SENSE/ADJ

Remote Sense Pin

or Output Adjust Pin

GND

Ground

GND

Ground

Pin Description for TO220-5 and TO263-5 Packages

Pin #

LP3962

LP3965

Name

Function

Name

Function

Shutdown

Input Supply

GND

Ground

GND

Ground

OUT

Output Voltage

OUT

Output Voltage

ERROR

ERROR Flag

SENSE/ADJ

Remote Sense Pin

or Output Adjust Pin

DS101266-5

Top View

TO220-5 Package

Bent, Staggered Leads

DS101266-6

Top View

TO263-5 Package

LP3962/LP3965

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Ordering Information

TABLE 1. Package Marking and Ordering Information

Output

Voltage

Order Number

Description

(Current, Option)

Package

Type

Package

Marking

Supplied As:

5.0

LP3962EMP-5.0

1.5A, Error Flag

SOT223-5

LBTB

1000 units on Tape

and Reel

5.0

LP3962EMPX-5.0

1.5A, Error Flag

SOT223-5

LBTB

2000 units on Tape

and Reel

3.3

LP3962EMP-3.3

1.5A, Error Flag

SOT223-5

LBEB

1000 units on Tape

and Reel

3.3

LP3962EMPX-3.3

1.5A, Error Flag

SOT223-5

LBEB

2000 units on Tape

and Reel

2.5

LP3962EMP-2.5

1.5A, Error Flag

SOT223-5

LBDB

1000 units on Tape

and Reel

2.5

LP3962EMPX-2.5

1.5A, Error Flag

SOT223-5

LBDB

2000 units on Tape

and Reel

1.8

LP3962EMP-1.8

1.5A, Error Flag

SOT223-5

LBCB

1000 units on Tape

and Reel

1.8

LP3962EMPX-1.8

1.5A, Error Flag

SOT223-5

LBCB

2000 units on Tape

and Reel

5.0

LP3965EMP-5.0

1.5A, SENSE

SOT223-5

LBVB

1000 units on Tape

and Reel

5.0

LP3965EMPX-5.0

1.5A, SENSE

SOT223-5

LBVB

2000 units on Tape

and Reel

3.3

LP3965EMP-3.3

1.5A, SENSE

SOT223-5

LBNB

1000 units on Tape

and Reel

3.3

LP3965EMPX-3.3

1.5A, SENSE

SOT223-5

LBNB

2000 units on Tape

and Reel

2.5

LP3965EMP-2.5

1.5A, SENSE

SOT223-5

LBLB

1000 units on Tape

and Reel

2.5

LP3965EMPX-2.5

1.5A, SENSE

SOT223-5

LBLB

2000 units on Tape

and Reel

1.8

LP3965EMP-1.8

1.5A, SENSE

SOT223-5

LBKB

1000 units on Tape

and Reel

1.8

LP3965EMPX-1.8

1.5A, SENSE

SOT223-5

LBKB

2000 units on Tape

and Reel

ADJ

LP3965EMP-ADJ

1.5A, ADJ

SOT223-5

LBRB

1000 units on Tape

and Reel

DS101266-31

Package Type Designator is

″

for SOT223 package,

″

for TO220 package, and

″

for TO263 package.

LP3962/LP3965

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Ordering Information

(Continued)

TABLE 1. Package Marking and Ordering Information (Continued)

Output

Voltage

Order Number

Description

(Current, Option)

Package

Type

Package

Marking

Supplied As:

ADJ

LP3965EMPX-ADJ

1.5A, ADJ

SOT223-5

LBRB

2000 units on Tape

and Reel

5.0

LP3962ES-5.0

1.5A, Error Flag

TO263-5

LP3962ES-5.0

Rail

5.0

LP3962ESX-5.0

1.5A, Error Flag

TO263-5

LP3962ESX-5.0

Tape and Reel

3.3

LP3962ES-3.3

1.5A, Error Flag

TO263-5

LP3962ES-3.3

Rail

3.3

LP3962ESX-3.3

1.5A, Error Flag

TO263-5

LP3962ES-3.3

Tape and Reel

2.5

LP3962ES-2.5

1.5A, Error Flag

TO263-5

LP3962ES-2.5

Rail

2.5

LP3962ESX-2.5

1.5A, Error Flag

TO263-5

LP3962ES-2.5

Tape and Reel

1.8

LP3962ES-1.8

1.5A, Error Flag

TO263-5

LP3962ES-1.8

Rail

1.8

LP3962ESX-1.8

1.5A, Error Flag

TO263-5

LP3962ES-1.8

Tape and Reel

5.0

LP3965ES-5.0

1.5A, SENSE

TO263-5

LP3965ES-5.0

Rail

5.0

LP3965ESX-5.0

1.5A, SENSE

TO263-5

LP3965ES-5.0

Tape and Reel

3.3

LP3965ES-3.3

1.5A, SENSE

TO263-5

LP3965ES-3.3

Rail

3.3

LP3965ESX-3.3

1.5A, SENSE

TO263-5

LP3965ES-3.3

Tape and Reel

2.5

LP3965ES-2.5

1.5A, SENSE

TO263-5

LP3965ES-2.5

Rail

2.5

LP3965ESX-2.5

1.5A, SENSE

TO263-5

LP3965ES-2.5

Tape and Reel

1.8

LP3965ES-1.8

1.5A, SENSE

TO263-5

LP3965ES-1.8

Rail

1.8

LP3965ESX-1.8

1.5A, SENSE

TO263-5

LP3965ES-1.8

Tape and Reel

ADJ

LP3965ES-ADJ

1.5A, ADJ

TO263-5

LP3965ES-ADJ

Rail

ADJ

LP3965ESX-ADJ

1.5A, ADJ

TO263-5

LP3965ES-ADJ

Tape and Reel

5.0

LP3962ET-5.0

1.5A, Error Flag

TO220-5

LP3962ET-5.0

Rail

3.3

LP3962ET-3.3

1.5A, Error Flag

TO220-5

LP3962ET-3.3

Rail

2.5

LP3962ET-2.5

1.5A, Error Flag

TO220-5

LP3962ET-2.5

Rail

1.8

LP3962ET-1.8

1.5A, Error Flag

TO220-5

LP3962ET-1.8

Rail

5.0

LP3965ET-5.0

1.5A, SENSE

TO220-5

LP3965ET-5.0

Rail

3.3

LP3965ET-3.3

1.5A, SENSE

TO220-5

LP3965ET-3.3

Rail

2.5

LP3965ET-2.5

1.5A, SENSE

TO220-5

LP3965ET-2.5

Rail

1.8

LP3965ET-1.8

1.5A, SENSE

TO220-5

LP3965ET-1.8

Rail

ADJ

LP3965ET-ADJ

1.5A, ADJ

TO220-5

LP3965ET-ADJ

Rail

LP3962/LP3965

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Absolute Maximum Ratings

(Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Storage Temperature Range

−65˚C to +150˚C

Lead Temperature

(Soldering, 5 sec.)

260˚C

ESD Rating (Note 3)

2 kV

Power Dissipation (Note 2)

Internally Limited

Input Supply Voltage (Survival)

−0.3V to +7.5V

Shutdown Input Voltage (Survival)

−0.3V to V

+0.3V

Output Voltage (Survival), (Note

6), (Note 7)

−0.3V to +7.5V

OUT

(Survival)

Short Circuit Protected

Maximum Voltage for ERROR Pin

+0.3V

Maximum Voltage for SENSE Pin

OUT

+0.3V

Operating Ratings

Input Supply Voltage (Operating)

2.5V to 7.0V

Shutdown Input Voltage

(Operating)

−0.3V to V

+0.3V

Maximum Operating Current

(DC)

1.5A

Operating Junction Temp. Range

−40˚C to +125˚C

Electrical Characteristics

LP3962/LP3965

Limits in standard typeface are for T

= 25˚C, and limits in boldface type apply over the full operating temperature

range. Unless otherwise specified: V

= V

O(NOM)

+ 1V, I

= 10 mA, C

OUT

=10µF, V

= V

-0.3V.

Symbol

Parameter

Conditions

Typ

(Note

LP3962/5 (Note 5)

Units

Min

Max

Output Voltage

Tolerance

(Note 8)

OUT

+1V

7.0V

10 mA

1.5 A

-1.5

-3.0

+1.5

+3.0

3.135

≤

7.0 for

OUT

= 2.5V

∆

Output Voltage Line

Regulation (Note 8)

OUT

+1V

7.0V,

0.02

0.06

∆

OUT

Output Voltage Load

Regulation

(Note 8)

10 mA

1.5 A

0.04

0.09

OUT

Dropout Voltage

(Note 10)

150 mA

= 1.5 A

380

450

550

GND

Ground Pin Current In

Normal Operation

Mode

= 150 mA

= 1.5 A

GND

Ground Pin Current In

Shutdown Mode

(Note 11)

≤

0.2V

µA

O(PK)

Peak Output Current

(Note 2)

2.5

2.0

1.7

SHORT CIRCUIT PROTECTION

Short Circuit Current

4.5

OVER TEMPERATURE PROTECTION

Tsh(t)

Shutdown Threshold

165

˚C

Tsh(h)

Thermal Shutdown

Hysteresis

˚C

SHUTDOWN INPUT

SDT

Shutdown Threshold

Output = High

–0.3

Output = Low

0.2

dOFF

Turn-off delay

= 1.5 A

µs

dON

Turn-on delay

= 1.5 A

µs

SD Input Current

= V

LP3962/LP3965

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Electrical Characteristics

LP3962/LP3965

(Continued)

Limits in standard typeface are for T

= 25˚C, and limits in boldface type apply over the full operating temperature

range. Unless otherwise specified: V

= V

O(NOM)

+ 1V, I

= 10 mA, C

OUT

=10µF, V

= V

-0.3V.

Symbol

Parameter

Conditions

Typ

(Note

LP3962/5 (Note 5)

Units

Min

Max

ERROR FLAG COMPARATOR

Threshold

(Note 9)

Threshold Hysteresis

(Note 9)

EF(Sat)

Error Flag Saturation

sink

= 100µA

0.02

0.1

Flag Reset Delay

µs

Error Flag Pin Leakage

Current

max

Error Flag Pin Sink

Current

Error

= 0.5V (over

temp.)

AC PARAMETERS

PSRR

Ripple Rejection

= V

OUT

+ 1.5V

OUT

= 100uF

OUT

= 3.3V

= V

OUT

+ 0.3V

OUT

= 100uF

OUT

= 3.3V

n(l/f

Output Noise Density

f = 120Hz

0.8

µV

Output Noise Voltage

(rms)

BW = 10Hz – 100kHz

150

µV

(rms)

BW = 300Hz – 300kHz

100

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is in-

tended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Charateristics. The guar-

anteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test

conditions.

Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at

= 50˚C/W

(with 0.5in

, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at

= 60˚C/W (with

0.5in

, 1oz. copper area), junction-to-ambient. The devices in SOT223 package must be derated at

= 90˚C/W (with 0.5in

, 1oz. copper area), junction-to-ambient.

Note 3: The human body model is a 100pF capacitor discharged through a 1.5k

Ω

resistor into each pin.

Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm.

Note 5: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control

(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).

Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP396X output must be diode-clamped to ground.

Note 7: The output PMOS structure contains a diode between the V

and V

OUT

terminals. This diode is normally reverse biased. This diode will get forward biased

if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp

of peak current.

Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load

regulation is defined as the change in output voltage from the nominal value due to change in load current. The line and load regulation specification contains only

the typical number. However, the limits for line and load regulation are included in the output voltage tolerance specification.

Note 9: Error Flag threshold and hysteresis are specified as percentage of regulated output voltage.

Note 10: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage speci-

fication applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential, since

the minimum input voltage is 2.5V.

Note 11: This specification has been tested for −40˚C

≤

85˚C since the temperature rise of the device is negligible under shutdown conditions.

LP3962/LP3965

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Applications Information

Input Capacitor Selection

The LP3962 and LP3965 require a minimum input capaci-

tance of 10µF between the input and ground pins to prevent

any impedance interactions with the supply. This capacitor

should be located very close to the V

pin. This capacitor

can be of any type such as ceramic, tantalum, or aluminium.

Any good quality capacitor which has good tolerance over

temperature and frequency is recommended.

Output Capacitor Selection

The LP3962 and LP3965 require a minimum of 10µF capaci-

tance between the output and ground pins for proper opera-

tion. LP3962 and LP3965 work best with Tantalum or Elec-

trolytic capacitor. The output capacitor should have a good

tolerance over temperature, voltage, and frequency. Larger

capacitance provides better improved load dynamics and

noise performance. The output capacitor should be con-

nected very close to the Vout pin.

Output Adjustment

An adjustable output device has output voltage range of

1.215V to 5.1V. To obtain a desired output voltage, the fol-

lowing equation can be used with R1 always a 10k

Ω

resistor.

For output stability, C

must be between 68pF and 100pF.

Output Noise

Noise is specified in two ways-

Spot Noise or Output noise density is the RMS sum of all

noise sources, measured at the regulator output, at a spe-

cific frequency (measured with a 1Hz bandwidth). This type

of noise is usually plotted on a curve as a function of fre-

quency.

Total output Noise or Broad-band noise is the RMS sum

of spot noise over a specified bandwidth, usually several de-

cades of frequencies.

Attention should be paid to the units of measurement. Spot

noise is measured in units µV/

√

Hz or nV/

√

Hz and total output

noise is measured in µV(rms).

The primary source of noise in low-dropout regulators is the

internal reference. In CMOS regulators, noise has a low fre-

quency component and a high frequency component, which

depend strongly on the silicon area and quiescent current.

Noise can be reduced in two ways: by increasing the transis-

tor area or by increasing the current drawn by the internal

reference. Increasing the area will decrease the chance of

fitting the die into a smaller package. Increasing the current

drawn by the internal reference increases the total supply

current (ground pin current). Using an optimized trade-off of

ground pin current and die size, LP3962/LP3965 achieves

low noise performance and low quiescent current operation.

The total output noise specification for LP3962/LP3965 is

presented in the Electrical Characteristics table. The Output

noise density at different frequencies is represented by a

curve under typical performance characteristics.

Short-Circuit Protection

The LP3962and LP3965 is short circuit protected and in the

event of a peak over-current condition, the short-circuit con-

trol loop will rapidly drive the output PMOS pass element off.

Once the power pass element shuts down, the control loop

will rapidly cycle the output on and off until the average

power dissipation causes the thermal shutdown circuit to re-

spond to servo the on/off cycling to a lower frequency.

Please refer to the section on thermal information for power

dissipation calculations.

Error Flag Operation

The LP3962/LP3965 produces a logic low signal at the Error

Flag pin when the output drops out of regulation due to low

input voltage, current limiting, or thermal limiting. This flag

has a built in hysteresis. The timing diagram in

Figure 1

shows the relationship between the ERROR and the output

voltage. In this example, the input voltage is changed to

demonstrate the functionality of the Error Flag.

The internal Error flag comparator has an open drain output

stage. Hence, the ERROR pin should be pulled high through

a pull up resistor. Although the ERROR pin can sink current

of 1mA, this current is energy drain from the input supply.

Hence, the value of the pull up resistor should be in the

range of 10k

Ω

to 1M

Ω

. The ERROR pin must be con-

nected to ground if this function is not used. It should

also be noted that when the shutdown pin is pulled low, the

ERROR pin is forced to be invalid for reasons of saving

power in shutdown mode.<